| commit | 9fbb1b096ff64e83a822d165fb732f22a2ec6e79 | [log] [tgz] |
|---|---|---|
| author | Angel Pons <th3fanbus@gmail.com> | Thu Nov 19 12:53:36 2020 +0100 |
| committer | Patrick Georgi <pgeorgi@google.com> | Sun Nov 22 22:13:28 2020 +0000 |
| tree | 114937a1f3b5d9a1be3790a43483b329e2fd9ae5 | |
| parent | 09fc4b90ebfdb81914f6b89b676db101a417414a [diff] [blame] |
nb/intel/sandybridge: Only use write Vref if supported Only some Ivy Bridge SKUs support write Vref control. Change-Id: I4e606c69c6758d909946da43c3d243e3af8833cf Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47747 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/northbridge/intel/sandybridge/registers/host_bridge.h b/src/northbridge/intel/sandybridge/registers/host_bridge.h index 4814b94..9599871 100644 --- a/src/northbridge/intel/sandybridge/registers/host_bridge.h +++ b/src/northbridge/intel/sandybridge/registers/host_bridge.h
@@ -52,6 +52,7 @@ #define CAPID_ECCDIS (1 << 25) #define CAPID_DDPCD (1 << 14) #define CAPID_PDCD (1 << 12) +#define CAPID_WRTVREF (1 << 1) #define CAPID_DDRSZ(x) (((x) >> 19) & 0x3) #define CAPID0_B 0xe8 /* Capabilities Register B */