Revert "broadwell: update processor power limits configuration"
This reverts commit fa42d568a00e5daadd35722790c529539227130e.
Reason for revert: Passes in an incompatible structure and only happens
to boot by chance. Moreover, Broadwell will soon be merged with Haswell
and this requires Broadwell to not depend on any Intel common SoC code.
Tested on out-of-tree Acer Aspire E5-573, PL values are correct again.
Change-Id: I6e8e000dba8ff09fab4e6f174ab703348dcd6a96
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45011
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/broadwell/systemagent.c b/src/soc/intel/broadwell/systemagent.c
index 4b4848b..dc6f546 100644
--- a/src/soc/intel/broadwell/systemagent.c
+++ b/src/soc/intel/broadwell/systemagent.c
@@ -8,7 +8,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <intelblocks/power_limit.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/acpi.h>
#include <soc/cpu.h>
@@ -406,7 +405,6 @@
static void systemagent_init(struct device *dev)
{
- struct soc_power_limits_config *config;
u8 bios_reset_cpl, pair;
/* Enable Power Aware Interrupt Routing */
@@ -426,8 +424,7 @@
/* Configure turbo power limits 1ms after reset complete bit */
mdelay(1);
- config = config_of_soc();
- set_power_limits(MOBILE_SKU_PL1_TIME_SEC, config);
+ set_power_limits(28);
}
static struct device_operations systemagent_ops = {