cpu/intel/model_2065x: Drop configurable TDP copy-pasta
Configurable TDP is only supported by Ivy Bridge onwards.
Change-Id: I8a742ab6d9d22b325ed725df4f749955efb3028f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49807
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c
index 934d7ec..39d028b 100644
--- a/src/cpu/intel/model_2065x/acpi.c
+++ b/src/cpu/intel/model_2065x/acpi.c
@@ -124,15 +124,9 @@
msr = rdmsr(MSR_PLATFORM_INFO);
ratio_min = (msr.hi >> (40-32)) & 0xff; /* Max Efficiency Ratio */
- /* Determine if this CPU has configurable TDP */
- if (cpu_config_tdp_levels()) {
- /* Set max ratio to nominal TDP ratio */
- msr = rdmsr(MSR_CONFIG_TDP_NOMINAL);
- ratio_max = msr.lo & 0xff;
- } else {
- /* Max Non-Turbo Ratio */
- ratio_max = (msr.lo >> 8) & 0xff;
- }
+ /* Max Non-Turbo Ratio */
+ ratio_max = (msr.lo >> 8) & 0xff;
+
clock_max = ratio_max * IRONLAKE_BCLK + ratio_max / 3;
/* Calculate CPU TDP in mW */
diff --git a/src/cpu/intel/model_2065x/model_2065x.h b/src/cpu/intel/model_2065x/model_2065x.h
index 566f82e..9c8b180 100644
--- a/src/cpu/intel/model_2065x/model_2065x.h
+++ b/src/cpu/intel/model_2065x/model_2065x.h
@@ -43,13 +43,6 @@
#define PKG_POWER_LIMIT_TIME_SHIFT 17
#define PKG_POWER_LIMIT_TIME_MASK 0x7f
-#define IVB_CONFIG_TDP_MIN_CPUID 0x306a2
-#define MSR_CONFIG_TDP_NOMINAL 0x648
-#define MSR_CONFIG_TDP_LEVEL1 0x649
-#define MSR_CONFIG_TDP_LEVEL2 0x64a
-#define MSR_CONFIG_TDP_CONTROL 0x64b
-#define MSR_TURBO_ACTIVATION_RATIO 0x64c
-
/* P-state configuration */
#define PSS_MAX_ENTRIES 16
#define PSS_RATIO_STEP 1
@@ -61,7 +54,6 @@
/* Configure power limits for turbo mode */
void set_power_limits(u8 power_limit_1_time);
-int cpu_config_tdp_levels(void);
/* Sanity check config options. */
#if (CONFIG_SMM_TSEG_SIZE <= CONFIG_SMM_RESERVED_SIZE)
diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c
index 9bac0dd..44552f5 100644
--- a/src/cpu/intel/model_2065x/model_2065x_init.c
+++ b/src/cpu/intel/model_2065x/model_2065x_init.c
@@ -20,19 +20,6 @@
#include <cpu/intel/common/common.h>
#include <smp/node.h>
-int cpu_config_tdp_levels(void)
-{
- msr_t platform_info;
-
- /* Minimum CPU revision */
- if (cpuid_eax(1) < IVB_CONFIG_TDP_MIN_CPUID)
- return 0;
-
- /* Bits 34:33 indicate how many levels supported */
- platform_info = rdmsr(MSR_PLATFORM_INFO);
- return (platform_info.hi >> 1) & 3;
-}
-
static void configure_thermal_target(void)
{
struct cpu_intel_model_2065x_config *conf;
@@ -77,19 +64,12 @@
perf_ctl.hi = 0;
- /* Check for configurable TDP option */
- if (cpu_config_tdp_levels()) {
- /* Set to nominal TDP ratio */
- msr = rdmsr(MSR_CONFIG_TDP_NOMINAL);
- perf_ctl.lo = (msr.lo & 0xff) << 8;
- } else {
- /* Platform Info bits 15:8 give max ratio */
- msr = rdmsr(MSR_PLATFORM_INFO);
- perf_ctl.lo = msr.lo & 0xff00;
- }
+ /* Platform Info bits 15:8 give max ratio */
+ msr = rdmsr(MSR_PLATFORM_INFO);
+ perf_ctl.lo = msr.lo & 0xff00;
wrmsr(IA32_PERF_CTL, perf_ctl);
- printk(BIOS_DEBUG, "model_x06ax: frequency set to %d\n",
+ printk(BIOS_DEBUG, "model_x065x: frequency set to %d\n",
((perf_ctl.lo >> 8) & 0xff) * IRONLAKE_BCLK);
}