samus: Update SPD with correct geometry and timings
This memory is also x16 and needs slight tweak to tRFCmin
in order to be functional.
BUG=chrome-os-partner:31833
BRANCH=None
TEST=build and boot on EVT unit with this config
Original-Change-Id: I01163ee7e70f08ccad84a3da39f1aac96e4c4771
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/217190
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 6c4bf71c8c8e1e46ce290441c2e21bc7b2839760)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I389936d85e61a0a939cd4485fcc0723d2a0aa4d6
Reviewed-on: http://review.coreboot.org/8972
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
1 file changed