commit | dca081b5e6c7bfdba991d625c36141c01baad513 | [log] [tgz] |
---|---|---|
author | Nico Huber <nico.huber@secunet.com> | Tue Jun 15 17:19:10 2021 +0200 |
committer | Werner Zeh <werner.zeh@siemens.com> | Thu Jun 17 05:46:49 2021 +0000 |
tree | 06d2ed903d125c1a54a32badb8fd2d4fdbbafa7f | |
parent | 85c9dda1c4446163e4d01ef5defab3a415751107 [diff] |
soc/intel/common/pmc: Avoid unnecessary writes of AFTERG3_EN pmc_set_power_failure_state() is usually called twice, once upon boot (with `target_on == true`) and once from SMM when the system is shut down (with `target_on == false`). Assuming settings didn't change between these calls, there is only one case where we actually need to write the register value: when updating the state for the MAINBOARD_POWER_STATE_PREVIOUS feature. This suits us well as we want to avoid unnecessary writes so we don't clobber the value set upon boot from within SMM. Due to inaccessible option backends, SMM might not know the current option state. The assumption above, that the option value didn't change, may not be true if the user changed the option on purpose. In the future, one would have to reboot the machine for option changes to take effect. However, this doesn't seem to make a huge difference: One already needed a controlled shutdown for the update to take effect before. A reboot doesn't seem much more expensive. Change-Id: I58dd74b8b073f4f07db090bf7fddb14b5df8239a Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55539 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you're feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.