diff --git a/src/mainboard/asus/p2b-d/Kconfig b/src/mainboard/asus/p2b-d/Kconfig
index 2e85fe0..4f18006 100644
--- a/src/mainboard/asus/p2b-d/Kconfig
+++ b/src/mainboard/asus/p2b-d/Kconfig
@@ -31,6 +31,7 @@
 	select SMP
 	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
+	select SDRAMPWR_4DIMM
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/asus/p2b-ds/Kconfig b/src/mainboard/asus/p2b-ds/Kconfig
index 889648f..dc77f19 100644
--- a/src/mainboard/asus/p2b-ds/Kconfig
+++ b/src/mainboard/asus/p2b-ds/Kconfig
@@ -31,6 +31,7 @@
 	select SMP
 	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
+	select SDRAMPWR_4DIMM
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/asus/p2b-ls/Kconfig b/src/mainboard/asus/p2b-ls/Kconfig
index 973d1a3..d1fd397 100644
--- a/src/mainboard/asus/p2b-ls/Kconfig
+++ b/src/mainboard/asus/p2b-ls/Kconfig
@@ -29,6 +29,7 @@
 	select HAVE_PIRQ_TABLE
 	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
+	select SDRAMPWR_4DIMM
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/asus/p3b-f/Kconfig b/src/mainboard/asus/p3b-f/Kconfig
index c57ae30..4e00e12 100644
--- a/src/mainboard/asus/p3b-f/Kconfig
+++ b/src/mainboard/asus/p3b-f/Kconfig
@@ -29,6 +29,7 @@
 	select HAVE_PIRQ_TABLE
 	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_256
+	select SDRAMPWR_4DIMM
 
 config MAINBOARD_DIR
 	string
diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig
index 696e884..4de84d3 100644
--- a/src/northbridge/intel/i440bx/Kconfig
+++ b/src/northbridge/intel/i440bx/Kconfig
@@ -22,3 +22,16 @@
 	bool
 	select HAVE_HIGH_TABLES
 
+config SDRAMPWR_4DIMM
+	bool
+	depends on NORTHBRIDGE_INTEL_I440BX
+	default n
+	help
+	  This option affects how the SDRAMC register is programmed.
+	  Memory clock signals will not be routed properly if this option
+	  is set wrong.
+	
+	  If your board has 4 DIMM slots, you must use select this option, in
+	  your Kconfig file of the board. On boards with 3 DIMM slots,
+	  do _not_ select this option.
+
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c
index 3de2dd7..43e2a45 100644
--- a/src/northbridge/intel/i440bx/raminit.c
+++ b/src/northbridge/intel/i440bx/raminit.c
@@ -292,7 +292,11 @@
 	 *         0 = 3 clocks of RAS# precharge
 	 *         1 = 2 clocks of RAS# precharge
 	 */
-	SDRAMC + 0, 0x00, 0x00,
+#if CONFIG_SDRAMPWR_4DIMM
+	SDRAMC + 0, 0x00, 0x10, /* The board has 4 DIMM slots. */
+#else
+	SDRAMC + 0, 0x00, 0x00, /* The board has 3 DIMM slots.*/
+#endif
 	SDRAMC + 1, 0x00, 0x00,
 
 	/* PGPOL - Paging Policy Register