commit | 9bc5b0097bacf456306e05a95a8b86440d405a17 | [log] [tgz] |
---|---|---|
author | Subrata Banik <subratabanik@google.com> | Wed Apr 06 18:41:25 2022 +0000 |
committer | Subrata Banik <subratabanik@google.com> | Mon Apr 11 06:15:52 2022 +0000 |
tree | d6edec7761a3854fced349a154522d404222fd02 | |
parent | 9d8dac0dbe03f5deb1c9f6db349aef1c678a5ee3 [diff] |
drivers/intel/fsp2_0: Allow coreboot to control FSP serial redirection Commit 3ba6f8cdf (drivers/intel/fsp2_0: Add native implementation for FSP Debug Handler) implements a native FSP debug handler. However, coreboot still can't control when to redirect FSP debug output to the serial console, i.e., at present, integrating a FSP debug binary is enough to output FSP serial messages irrespective of whether user is intended to see FSP debug log. coreboot needs additional mechanism to control FSP debug binary to redirect debug messages over serial port. This patch introduces a config `FSP_ENABLE_SERIAL_DEBUG` to control the FSP debug output, user to enable this config from site-local config file in case like to override the default FSP serial redirection behaviour in more controlled way from coreboot. There could be scenarios as below: Scenario 1: coreboot release image integrated with the FSP debug binaries, is capable of redirecting to the serial console, but coreboot decides to override the config as below to skip FSP debug output redirection to the serial port. `#`FSP Serial console disabled by default (do not remove) `#`CONFIG_FSP_ENABLE_SERIAL_DEBUG is not set Scenario 2: For coreboot serial image with FSP debug binaries integrated but coreboot decides to skip FSP debug output redirection to the serial port. `#`FSP Serial console disabled by default (do not remove) `#`CONFIG_FSP_ENABLE_SERIAL_DEBUG is not set CONFIG_CONSOLE_SERIAL=y CONFIG_CONSOLE_SERIAL_115200=y CONFIG_UART_DEBUG=y CONFIG_UART_FOR_CONSOLE=0 Scenario 3: The final image could be a coreboot serial image with FSP serial redirection enabled to output to the serial port. CONFIG_FSP_ENABLE_SERIAL_DEBUG=y CONFIG_CONSOLE_SERIAL=y CONFIG_CONSOLE_SERIAL_115200=y CONFIG_UART_DEBUG=y CONFIG_UART_FOR_CONSOLE=0 BUG=b:227151510 TEST=Able to build and boot google/redrix with all scenarios between #1--#3 and able to meet the expectation as mentioned above. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I0b008ca9d4f40bfa6a989a6fd655c234f91fde65 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63166 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you're feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.