soc/intel/skylake: Hook up FSP hyper-threading setting to option API
Hook up the hyper-threading setting from the FSP to the option API so
that related mainboards don't have to do that. Unless otherwise
configured (e.g. the CMOS setting or overriden by the mainboard code),
the value from the Kconfig setting `FSP_HYPERTHREADING` is used.
Also, remove related code from the mainboard kontron/bsl6, since it is
obsolete now.
Change-Id: I1023d1b94acb63f30455c56b394b68059deaaa16
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60542
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
diff --git a/src/mainboard/kontron/bsl6/romstage.c b/src/mainboard/kontron/bsl6/romstage.c
index b77073c..3206f53 100644
--- a/src/mainboard/kontron/bsl6/romstage.c
+++ b/src/mainboard/kontron/bsl6/romstage.c
@@ -39,8 +39,5 @@
memory_params->DqPinsInterleaved = true;
memory_params->CaVrefConfig = 2;
- const uint8_t ht = get_uint_option("hyper_threading", memory_params->HyperThreading);
- memory_params->HyperThreading = ht;
-
variant_memory_init_params(mupd);
}
diff --git a/src/soc/intel/skylake/romstage/fsp_params.c b/src/soc/intel/skylake/romstage/fsp_params.c
index d7e1157..f24054a 100644
--- a/src/soc/intel/skylake/romstage/fsp_params.c
+++ b/src/soc/intel/skylake/romstage/fsp_params.c
@@ -4,6 +4,7 @@
#include <cpu/x86/msr.h>
#include <fsp/util.h>
#include <intelblocks/cpulib.h>
+#include <option.h>
#include <soc/iomap.h>
#include <soc/msr.h>
#include <soc/pci_devs.h>
@@ -101,7 +102,7 @@
/* HPET BDF already handled in coreboot code, so tell FSP to ignore UPDs */
m_cfg->PchHpetBdfValid = 0;
- m_cfg->HyperThreading = CONFIG(FSP_HYPERTHREADING);
+ m_cfg->HyperThreading = get_uint_option("hyper_threading", CONFIG(FSP_HYPERTHREADING));
}
static void soc_primary_gfx_config_params(FSP_M_CONFIG *m_cfg,