tree 4d23f557990d8edb3edb1b09e2be3cd609b6acd7
parent 6f573217a0920b18ea9febd9c6696a01b0f7c082
author Arthur Heymans <arthur@aheymans.xyz> 1667817598 +0100
committer Felix Held <felix-coreboot@felixheld.de> 1670250132 +0000

cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm

C5, C6 and slfm depend on the southbridge and the northbridge to be able
to provide this functionality, with some just lacking the possibility to
do so. Move the devicetree configuration to the southbridge.

This removes the need for a magic lapic in the devicetree.

Change-Id: I4a9b1e684a7927259adae9b1d42a67e907722109
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69297
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>