diff --git a/src/soc/amd/mendocino/acpi/globalnvs.asl b/src/soc/amd/mendocino/acpi/globalnvs.asl
index 4637916..7aa5de3 100644
--- a/src/soc/amd/mendocino/acpi/globalnvs.asl
+++ b/src/soc/amd/mendocino/acpi/globalnvs.asl
@@ -1,7 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
-/* TODO: Check if this is still correct */
-
 /*
  * NOTE: The layout of the GNVS structure below must match the layout in
  * soc/amd/mendocino/include/soc/nvs.h !!!
@@ -10,13 +8,8 @@
 Field (GNVS, ByteAcc, NoLock, Preserve)
 {
 	/* Miscellaneous */
-	,	8,	// 0x00 - Processor Count
-	LIDS,	8,	// 0x01 - LID State
-	,	8,	// 0x02 - AC Power State
-	CBMC,	32,	// 0x03 - 0x06 - coreboot Memory Console
-	PM1I,	64,	// 0x07 - 0x0e - System Wake Source - PM1 Index
-	GPEI,	64,	// 0x0f - 0x16 - GPE Wake Source
-	TMPS,	8,	// 0x17 - Temperature Sensor ID
-	TCRT,	8,	// 0x18 - Critical Threshold
-	TPSV,	8,	// 0x19 - Passive Threshold
+	LIDS,	8,	// 0x00 - LID State
+	CBMC,	32,	// 0x01 - 0x04 - coreboot Memory Console
+	PM1I,	64,	// 0x05 - 0x0c - System Wake Source - PM1 Index
+	GPEI,	64,	// 0x0d - 0x14 - GPE Wake Source
 }
diff --git a/src/soc/amd/mendocino/include/soc/nvs.h b/src/soc/amd/mendocino/include/soc/nvs.h
index bcf9bb0..085de01 100644
--- a/src/soc/amd/mendocino/include/soc/nvs.h
+++ b/src/soc/amd/mendocino/include/soc/nvs.h
@@ -1,7 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
-/* TODO: Check if this is still correct */
-
 /*
  * NOTE: The layout of the global_nvs structure below must match the layout
  * in soc/soc/amd/mendocino/acpi/globalnvs.asl !!!
@@ -15,15 +13,10 @@
 
 struct __packed global_nvs {
 	/* Miscellaneous */
-	uint8_t		unused_was_pcnt; /* 0x00 - Processor Count */
-	uint8_t		lids; /* 0x01 - LID State */
-	uint8_t		unused_was_pwrs; /* 0x02 - AC Power State */
-	uint32_t	cbmc; /* 0x03 - 0x06 - coreboot Memory Console */
-	uint64_t	pm1i; /* 0x07 - 0x0e - System Wake Source - PM1 Index */
-	uint64_t	gpei; /* 0x0f - 0x16 - GPE Wake Source */
-	uint8_t		tmps; /* 0x17 - Temperature Sensor ID */
-	uint8_t		tcrt; /* 0x18 - Critical Threshold */
-	uint8_t		tpsv; /* 0x19 - Passive Threshold */
+	uint8_t		lids; /* 0x00 - LID State */
+	uint32_t	cbmc; /* 0x01 - 0x04 - coreboot Memory Console */
+	uint64_t	pm1i; /* 0x05 - 0x0c - System Wake Source - PM1 Index */
+	uint64_t	gpei; /* 0x0d - 0x14 - GPE Wake Source */
 };
 
 #endif /* AMD_MENDOCINO_NVS_H */