pit: Bump the EC SPI bus speed up to 5 MHz
That speed is used with U-Boot instead of the more conservative 500 KHz.
Change-Id: Ie9d79db3b52b88c1f3bfec1745634ae6bdc9f4ee
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/63193
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/4386
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c
index 7ead3c9..b582f3e 100644
--- a/src/mainboard/google/pit/romstage.c
+++ b/src/mainboard/google/pit/romstage.c
@@ -126,7 +126,7 @@
{
/* SPI2 (EC) is slower and needs to work in half-duplex mode with
* single byte bus width. */
- clock_set_rate(PERIPH_ID_SPI2, 500000);
+ clock_set_rate(PERIPH_ID_SPI2, 5000000);
exynos_pinmux_spi2();
}