src/soc/qualcomm: Remove unnecessary space after casts

Change-Id: Ic6c711fe3fad19c24ca4c01f8d0a4bc002f14bd6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69807
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/qualcomm/common/include/soc/qspi_common.h b/src/soc/qualcomm/common/include/soc/qspi_common.h
index 6a1496a..a0c8e46 100644
--- a/src/soc/qualcomm/common/include/soc/qspi_common.h
+++ b/src/soc/qualcomm/common/include/soc/qspi_common.h
@@ -30,7 +30,7 @@
 };
 
 check_member(qcom_qspi_regs, rd_fifo, 0x50);
-static struct qcom_qspi_regs * const qcom_qspi = (void *) QSPI_BASE;
+static struct qcom_qspi_regs * const qcom_qspi = (void *)QSPI_BASE;
 
 // MSTR_CONFIG register
 
diff --git a/src/soc/qualcomm/common/qspi.c b/src/soc/qualcomm/common/qspi.c
index 1c345cc..eb0c062 100644
--- a/src/soc/qualcomm/common/qspi.c
+++ b/src/soc/qualcomm/common/qspi.c
@@ -66,7 +66,7 @@
 	uint32_t mstr_int_status;
 
 	write32(&qcom_qspi->mstr_int_sts, 0xFFFFFFFF);
-	write32(&qcom_qspi->next_dma_desc_addr, (uint32_t)(uintptr_t) chain);
+	write32(&qcom_qspi->next_dma_desc_addr, (uint32_t)(uintptr_t)chain);
 
 	while (1) {
 		mstr_int_status = read32(&qcom_qspi->mstr_int_sts);
@@ -87,15 +87,15 @@
 		if (desc->direction == MASTER_READ) {
 			if (desc->bounce_length == 0)
 				dcache_invalidate_by_mva(
-					(void *)(uintptr_t) desc->data_address,
+					(void *)(uintptr_t)desc->data_address,
 					desc->length);
 			else {
-				src = (void *)(uintptr_t) desc->bounce_src;
-				dst = (void *)(uintptr_t) desc->bounce_dst;
+				src = (void *)(uintptr_t)desc->bounce_src;
+				dst = (void *)(uintptr_t)desc->bounce_dst;
 				memcpy(dst, src, desc->bounce_length);
 			}
 		}
-		desc = (void *)(uintptr_t) desc->next_descriptor;
+		desc = (void *)(uintptr_t)desc->next_descriptor;
 	}
 	curr_desc_idx = -1;
 }
@@ -112,7 +112,7 @@
 	index = ++curr_desc_idx;
 	next = &dma->descriptors[index];
 
-	next->data_address = (uint32_t) (uintptr_t) dma->buffers[index];
+	next->data_address = (uint32_t)(uintptr_t)dma->buffers[index];
 
 	next->next_descriptor = 0;
 	next->direction = MASTER_READ;
@@ -131,7 +131,7 @@
 	next->bounce_length = 0;
 
 	if (current)
-		current->next_descriptor = (uint32_t)(uintptr_t) next;
+		current->next_descriptor = (uint32_t)(uintptr_t)next;
 
 	return next;
 }
@@ -164,13 +164,13 @@
 	desc = allocate_descriptor();
 	desc->direction = write;
 	desc->multi_io_mode = data_mode;
-	ptr = (void *)(uintptr_t) desc->data_address;
+	ptr = (void *)(uintptr_t)desc->data_address;
 
 	if (write) {
 		memcpy(ptr, data, data_bytes);
 	} else {
-		desc->bounce_src = (uint32_t)(uintptr_t) ptr;
-		desc->bounce_dst = (uint32_t)(uintptr_t) data;
+		desc->bounce_src = (uint32_t)(uintptr_t)ptr;
+		desc->bounce_dst = (uint32_t)(uintptr_t)data;
 		desc->bounce_length = data_bytes;
 	}
 
@@ -185,7 +185,7 @@
 	desc = allocate_descriptor();
 	desc->direction = write;
 	desc->multi_io_mode = data_mode;
-	desc->data_address = (uint32_t)(uintptr_t) data;
+	desc->data_address = (uint32_t)(uintptr_t)data;
 	desc->length = data_bytes;
 
 	if (write)
@@ -291,7 +291,7 @@
 		return -1;
 	}
 
-	queue_data((uint8_t *) (out_bytes ? dout : din),
+	queue_data((uint8_t *)(out_bytes ? dout : din),
 		in_bytes | out_bytes, mode, !!out_bytes);
 
 	flush_chain();
diff --git a/src/soc/qualcomm/common/qupv3_config.c b/src/soc/qualcomm/common/qupv3_config.c
index b243fdd..919c11b 100644
--- a/src/soc/qualcomm/common/qupv3_config.c
+++ b/src/soc/qualcomm/common/qupv3_config.c
@@ -188,7 +188,7 @@
 	struct gsi_fw_hdr *gsi_hdr;
 	struct gsi_fw_iep *fwIep;
 	struct gsi_fw_iram *fwIRam;
-	struct gsi_regs *regs = (struct gsi_regs *)(uintptr_t) addr;
+	struct gsi_regs *regs = (struct gsi_regs *)(uintptr_t)addr;
 	static const char * const filename = "fallback/gsi_fw";
 
 	/* Assign firmware header base */
@@ -241,7 +241,7 @@
 {
 	struct qupv3_common_reg *qupv3_common;
 	/* HPG section 3.1.2 */
-	qupv3_common = (struct qupv3_common_reg *)(uintptr_t) addr;
+	qupv3_common = (struct qupv3_common_reg *)(uintptr_t)addr;
 	setbits32(&qupv3_common->qupv3_common_cfg_reg,
 			QUPV3_COMMON_CFG_FAST_SWITCH_TO_HIGH_DISABLE_BMSK);
 
diff --git a/src/soc/qualcomm/common/usb/qusb_phy.c b/src/soc/qualcomm/common/usb/qusb_phy.c
index 494f7cd..ddb087f 100644
--- a/src/soc/qualcomm/common/usb/qusb_phy.c
+++ b/src/soc/qualcomm/common/usb/qusb_phy.c
@@ -96,7 +96,7 @@
 
 	hs_phy_reg = &qusb_phy;
 
-	hs_phy_reg->board_data = (struct usb_board_data *) board_data;
+	hs_phy_reg->board_data = (struct usb_board_data *)board_data;
 
 	/* PWR_CTRL: set the power down bit to disable the PHY */
 
diff --git a/src/soc/qualcomm/common/usb/snps_usb_phy.c b/src/soc/qualcomm/common/usb/snps_usb_phy.c
index 1b2d869..d04694b 100644
--- a/src/soc/qualcomm/common/usb/snps_usb_phy.c
+++ b/src/soc/qualcomm/common/usb/snps_usb_phy.c
@@ -36,7 +36,7 @@
 void hs_usb_phy_init(void *board_data)
 {
 	struct usb_board_data *override_data =
-				(struct usb_board_data *) board_data;
+				(struct usb_board_data *)board_data;
 
 	clrsetbits32(&hs_phy_reg->cfg0, UTMI_PHY_CMN_CTRL_OVERRIDE_EN,
 					UTMI_PHY_CMN_CTRL_OVERRIDE_EN);
diff --git a/src/soc/qualcomm/ipq40xx/blobs_init.c b/src/soc/qualcomm/ipq40xx/blobs_init.c
index 60e4f0d..ef19053 100644
--- a/src/soc/qualcomm/ipq40xx/blobs_init.c
+++ b/src/soc/qualcomm/ipq40xx/blobs_init.c
@@ -31,7 +31,7 @@
 	    (blob_mbn->mbn_total_size > blob_size))
 		return NULL;
 
-	blob_dest = (void *) blob_mbn->mbn_destination;
+	blob_dest = (void *)blob_mbn->mbn_destination;
 
 	if (blob_mbn->mbn_destination) {
 		/* Copy the blob to the appropriate memory location. */
diff --git a/src/soc/qualcomm/ipq40xx/spi.c b/src/soc/qualcomm/ipq40xx/spi.c
index 0893dfc..ab8f530 100644
--- a/src/soc/qualcomm/ipq40xx/spi.c
+++ b/src/soc/qualcomm/ipq40xx/spi.c
@@ -591,7 +591,7 @@
 	write_force_cs(slave, 1);
 
 	if (dout != NULL) {
-		ret = blsp_spi_write(ds, txp, (unsigned int) out_bytes);
+		ret = blsp_spi_write(ds, txp, (unsigned int)out_bytes);
 		if (ret != SUCCESS)
 			goto out;
 	}
diff --git a/src/soc/qualcomm/ipq806x/blobs_init.c b/src/soc/qualcomm/ipq806x/blobs_init.c
index 15068a5..851ee81 100644
--- a/src/soc/qualcomm/ipq806x/blobs_init.c
+++ b/src/soc/qualcomm/ipq806x/blobs_init.c
@@ -27,7 +27,7 @@
 	    (blob_mbn->mbn_total_size > blob_size))
 		return NULL;
 
-	blob_dest = (void *) blob_mbn->mbn_destination;
+	blob_dest = (void *)blob_mbn->mbn_destination;
 	if (blob_mbn->mbn_destination) {
 		/* Copy the blob to the appropriate memory location. */
 		memcpy(blob_dest, blob_mbn + 1, blob_mbn->mbn_total_size);
@@ -99,7 +99,7 @@
 		return;
 	}
 
-	load_addr = (u32) load_ipq_blob("rpm.mbn");
+	load_addr = (u32)load_ipq_blob("rpm.mbn");
 	if (!load_addr)
 		die("could not find or map RPM code\n");
 
diff --git a/src/soc/qualcomm/qcs405/spi.c b/src/soc/qualcomm/qcs405/spi.c
index e212b84..4863188 100644
--- a/src/soc/qualcomm/qcs405/spi.c
+++ b/src/soc/qualcomm/qcs405/spi.c
@@ -660,7 +660,7 @@
 		return ret;
 
 	if (dout != NULL) {
-		ret = blsp_spi_write(ds, txp, (unsigned int) out_bytes);
+		ret = blsp_spi_write(ds, txp, (unsigned int)out_bytes);
 		if (ret != SUCCESS)
 			goto out;
 	}
diff --git a/src/soc/qualcomm/sc7280/pcie.c b/src/soc/qualcomm/sc7280/pcie.c
index 28d520c..edc73b0 100644
--- a/src/soc/qualcomm/sc7280/pcie.c
+++ b/src/soc/qualcomm/sc7280/pcie.c
@@ -140,13 +140,13 @@
 };
 
 static pcie_cntlr_cfg_t pcie_host = {
-	.parf		= (void *) PCIE1_PCIE_PARF,
-	.dbi_base	= (void *) PCIE1_GEN3X2_PCIE_DBI,
-	.elbi		= (void *) PCIE1_GEN3X2_PCIE_ELBI,
-	.atu_base	= (void *) PCIE1_GEN3X2_DWC_PCIE_DM_IATU,
-	.cfg_base	= (void *) PCIE1_GEN3X2_PCIE_DBI + PCIE_EP_CONF_OFFSET,
-	.pcie_bcr	= (void *) PCIE1_BCR,
-	.qmp_phy_bcr	= (void *) GCC_PCIE_1_PHY_BCR,
+	.parf		= (void *)PCIE1_PCIE_PARF,
+	.dbi_base	= (void *)PCIE1_GEN3X2_PCIE_DBI,
+	.elbi		= (void *)PCIE1_GEN3X2_PCIE_ELBI,
+	.atu_base	= (void *)PCIE1_GEN3X2_DWC_PCIE_DM_IATU,
+	.cfg_base	= (void *)PCIE1_GEN3X2_PCIE_DBI + PCIE_EP_CONF_OFFSET,
+	.pcie_bcr	= (void *)PCIE1_BCR,
+	.qmp_phy_bcr	= (void *)GCC_PCIE_1_PHY_BCR,
 	.lanes		= PCIE_3x2_NUM_LANES,
 	.cfg_size	= PCIE_EP_CONF_SIZE,
 	.perst		= GPIO(2),
@@ -160,14 +160,14 @@
 };
 
 static pcie_qmp_phy_cfg_t pcie1_qmp_phy_3x2 = {
-	.qmp_phy_base		= (void *) PCIE_1_QMP_PHY,
-	.serdes			= (void *) PCE1_QPHY_SERDES,
-	.tx0			= (void *) PCE1_QPHY_TX0,
-	.rx0			= (void *) PCE1_QPHY_RX0,
-	.pcs			= (void *) PCIE1_QMP_PHY_PCS_COM,
-	.tx1			= (void *) PCE1_QPHY_TX1,
-	.rx1			= (void *) PCE1_QPHY_RX1,
-	.pcs_misc		= (void *) PCE1_QPHY_PCS_MISC,
+	.qmp_phy_base		= (void *)PCIE_1_QMP_PHY,
+	.serdes			= (void *)PCE1_QPHY_SERDES,
+	.tx0			= (void *)PCE1_QPHY_TX0,
+	.rx0			= (void *)PCE1_QPHY_RX0,
+	.pcs			= (void *)PCIE1_QMP_PHY_PCS_COM,
+	.tx1			= (void *)PCE1_QPHY_TX1,
+	.rx1			= (void *)PCE1_QPHY_RX1,
+	.pcs_misc		= (void *)PCE1_QPHY_PCS_MISC,
 	.serdes_tbl		= sc7280_qmp_pcie_serdes_tbl,
 	.serdes_tbl_num		= ARRAY_SIZE(sc7280_qmp_pcie_serdes_tbl),
 	.tx_tbl			= sc7280_qmp_pcie_tx_tbl,