This patch fixes the kernel EBDA mislocation problem. Thank you, Yinghai.
The change in tables.c protects the legacy x86 BIOS data segment
(0x400-0x4ff) from being used for storing coreboot tables. Some
bytes from the segment are used by the kernel and should not be
garbled.
The change in coreboot_table.c is not strictly necessary. It removes
some redundancy and confusion.
Signed-off-by: Roman Kononov <kononov@dls.net>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3437 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/arch/i386/boot/coreboot_table.c b/src/arch/i386/boot/coreboot_table.c
index 9dd6a32..900ab7c 100644
--- a/src/arch/i386/boot/coreboot_table.c
+++ b/src/arch/i386/boot/coreboot_table.c
@@ -402,7 +402,6 @@
unsigned long low_table_start, unsigned long low_table_end,
unsigned long rom_table_start, unsigned long rom_table_end)
{
- unsigned long table_size;
struct lb_header *head;
struct lb_memory *mem;
@@ -445,9 +444,8 @@
low_table_start, low_table_end - low_table_start);
/* Record the pirq table, acpi tables, and maybe the mptable */
- table_size=rom_table_end-rom_table_start;
lb_add_memory_range(mem, LB_MEM_TABLE,
- rom_table_start, table_size<0x10000?0x10000:table_size);
+ rom_table_start, rom_table_end-rom_table_start);
/* Note:
* I assume that there is always memory at immediately after