sb/intel/bd82x6x/pcie: Drop register write
The write to register 0x42 has no effect as at this point all
of the bits are read-only. Drop the line.
Change-Id: I7293e6eaa2d0bac5efe8316029bdecb04a5586e9
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78238
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index 45ce5aa..325bfd2 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -229,10 +229,8 @@
pci_write_config16(dev, 0x1e, reg16);
/* Enable expresscard hotplug events. */
- if (pci_is_hotplugable(dev)) {
+ if (pci_is_hotplugable(dev))
pci_or_config32(dev, 0xd8, 1 << 30);
- pci_write_config16(dev, 0x42, 0x142);
- }
}
static void pch_pcie_enable(struct device *dev)