if BOARD_SUNW_ULTRA40M2

config BOARD_SPECIFIC_OPTIONS # dummy
	def_bool y
	select CPU_AMD_SOCKET_F
	select DIMM_DDR2
	select DIMM_REGISTERED
	select NORTHBRIDGE_AMD_AMDK8
	select SOUTHBRIDGE_NVIDIA_MCP55
	select HT_CHAIN_DISTRIBUTE
	select MCP55_USE_NIC
	select MCP55_USE_AZA
	select SUPERIO_SMSC_DME1737
	select PARALLEL_CPU_INIT
	select HAVE_OPTION_TABLE
	select HAVE_PIRQ_TABLE
	select HAVE_MP_TABLE
	select LIFT_BSP_APIC_ID
	select BOARD_ROMSIZE_KB_1024
	select QRANK_DIMM_SUPPORT
	select K8_ALLOCATE_IO_RANGE

config MAINBOARD_DIR
	string
	default sunw/ultra40m2

config DCACHE_RAM_BASE
	hex
	default 0xc8000

config DCACHE_RAM_SIZE
	hex
	default 0x08000

config APIC_ID_OFFSET
	hex
	default 0x10

config MEM_TRAIN_SEQ
	int
	default 1

config MCP55_NUM
	int
	default 2

config MAINBOARD_PART_NUMBER
	string
	default "Ultra 40 M2"

config MAX_CPUS
	int
	default 4

config MAX_PHYSICAL_CPUS
	int
	default 2

config HT_CHAIN_UNITID_BASE
	hex
	default 0x0

config HT_CHAIN_END_UNITID_BASE
	hex
	default 0x20

config IRQ_SLOT_COUNT
	int
	default 11

config MCP55_PCI_E_X_0
	int
	default 1

config MCP55_PCI_E_X_1
	int
	default 1

endif # BOARD_SUNW_ULTRA40M2