commit 961658f3dc33720ad12371b973b4bf48a53a17b2
author Elyes HAOUAS <ehaouas@noos.fr> Mon Apr 06 09:42:21 2020 +0200
committer Angel Pons <th3fanbus@gmail.com> Thu Apr 09 14:45:38 2020 +0000
tree ccc9702fb24efecf77c6c30934636406306a337e
parent eb00e8722b21da6362f53179d24512d2236f62da

nb/intel/i945: Use 'const' to set pci_devfn_t statically

Change-Id: I879dd2fc61bc385486b506e2123f32629a67f518
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40227
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/northbridge/intel/i945/early_init.c

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index 368ebd2..d7bc1c6 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -498,10 +498,10 @@
 	u32 timeout;
 	u32 reg32;
 	u16 reg16;
-	pci_devfn_t p2peg = PCI_DEV(0, 0x01, 0);
+	const pci_devfn_t p2peg = PCI_DEV(0, 0x01, 0);
 
 	u8 tmp_secondary = 0x0a;
-	pci_devfn_t peg_plugin = PCI_DEV(tmp_secondary, 0, 0);
+	const pci_devfn_t peg_plugin = PCI_DEV(tmp_secondary, 0, 0);
 
 	printk(BIOS_DEBUG, "Enabling PCI Express x16 Link\n");
 
@@ -761,7 +761,7 @@
 static void i945_setup_root_complex_topology(void)
 {
 	u32 reg32;
-	pci_devfn_t p2peg = PCI_DEV(0, 0x01, 0);
+	const pci_devfn_t p2peg = PCI_DEV(0, 0x01, 0);
 
 	printk(BIOS_DEBUG, "Setting up Root Complex Topology\n");
 	/* Egress Port Root Topology */