nb/intel/nehalem: Rename to ironlake
The code is for Arrandale CPUs, whose System Agent is Ironlake.
This change simply replaces `nehalem` with `ironlake` and `NEHALEM`
with `IRONLAKE`. The remaining `Nehalem` cases are handled later, as
changing some of them would impact the resulting binary.
Tested with BUILD_TIMELESS=1 without adding the configuration options
into the binary, and packardbell/ms2290 does not change.
Change-Id: I8eb96eeb5e69f49150d47793b33e87b650c64acc
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38941
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/ironlake/Makefile.inc b/src/northbridge/intel/ironlake/Makefile.inc
new file mode 100644
index 0000000..1fde37d
--- /dev/null
+++ b/src/northbridge/intel/ironlake/Makefile.inc
@@ -0,0 +1,37 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2010 Google Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+ifeq ($(CONFIG_NORTHBRIDGE_INTEL_IRONLAKE),y)
+
+bootblock-y += bootblock.c
+
+ramstage-y += memmap.c
+ramstage-y += northbridge.c
+ramstage-y += smi.c
+ramstage-y += gma.c
+
+ramstage-y += acpi.c
+
+romstage-y += memmap.c
+romstage-y += raminit.c
+romstage-y += raminit_tables.c
+romstage-y += early_init.c
+romstage-y += romstage.c
+
+smm-y += finalize.c
+
+postcar-y += memmap.c
+
+endif