commit 95c39c28a3d4beb10143ad9c749241fcbdbfb2dc
author Kyösti Mälkki <kyosti.malkki@gmail.com> Sat Jun 22 14:05:28 2013 +0300
committer Kyösti Mälkki <kyosti.malkki@gmail.com> Wed Sep 11 07:19:36 2013 +0200
tree 536ec1b23e8591d7179f228a39e6984697edbc73
parent f9f74afdd7b39c12d399a900f3af326a33c87387

CBMEM ARM: Prefer get_cbmem_table() over cbmem_late_set_table()

Implementing get_cbmem_table() allows initializing CBMEM earlier.

Change-Id: I973f3a84dd9aaa2839959df5dda22909fdb9edeb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3560
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>

src/mainboard/google/pit/mainboard.c

diff --git a/src/mainboard/google/pit/mainboard.c b/src/mainboard/google/pit/mainboard.c
index 7dd8388..b91040c 100644
--- a/src/mainboard/google/pit/mainboard.c
+++ b/src/mainboard/google/pit/mainboard.c
@@ -221,14 +221,12 @@
 	// gpio_info();
 }
 
-static void setup_cbmem(void)
+void get_cbmem_table(uint64_t *base, uint64_t *size)
 {
-	u64 size = CONFIG_COREBOOT_TABLES_SIZE;
-	u64 base = CONFIG_SYS_SDRAM_BASE +
+	*size = CONFIG_COREBOOT_TABLES_SIZE;
+	*base = CONFIG_SYS_SDRAM_BASE +
 				((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) -
 				CONFIG_COREBOOT_TABLES_SIZE;
-	cbmem_late_set_table(base, size);
-	cbmem_init(base, size);
 }
 
 static void mainboard_enable(device_t dev)
@@ -236,7 +234,7 @@
 	dev->ops->init = &mainboard_init;
 
 	/* set up coreboot tables */
-	setup_cbmem();
+	cbmem_initialize();
 
 	/* set up dcache and MMU */
 	/* FIXME: this should happen via resource allocator */

src/mainboard/google/snow/mainboard.c

diff --git a/src/mainboard/google/snow/mainboard.c b/src/mainboard/google/snow/mainboard.c
index 8805be5..93cc303 100644
--- a/src/mainboard/google/snow/mainboard.c
+++ b/src/mainboard/google/snow/mainboard.c
@@ -262,14 +262,12 @@
 	// gpio_info();
 }
 
-static void setup_cbmem(void)
+void get_cbmem_table(uint64_t *base, uint64_t *size)
 {
-	u64 size = CONFIG_COREBOOT_TABLES_SIZE;
-	u64 base = CONFIG_SYS_SDRAM_BASE +
+	*size = CONFIG_COREBOOT_TABLES_SIZE;
+	*base = CONFIG_SYS_SDRAM_BASE +
 				((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) -
 				CONFIG_COREBOOT_TABLES_SIZE;
-	cbmem_late_set_table(base, size);
-	cbmem_init(base, size);
 }
 
 static void mainboard_enable(device_t dev)
@@ -277,7 +275,7 @@
 	dev->ops->init = &mainboard_init;
 
 	/* set up coreboot tables */
-	setup_cbmem();
+	cbmem_initialize();
 
 	/* set up dcache and MMU */
 	/* FIXME: this should happen via resource allocator */