acpi: correct the processor devices scope
The ACPI Spec 2.0 states, that Processor declarations should be made
within the ACPI namespace \_SB and not \_PR anymore. \_PR is deprecated
and is removed here.
Additionally add processor scope patching for P-State SSDT created by
AGESA, becasue AGESA creates the tables with processors in \_PR scope.
TEST=boot Debian Linux on PC Engines apu2, check dmesg that there are
no errors, decompile ACPI tables with acpica to check whether the
processor scope is correct and if IASL does not complain on wrong
checksum, run FWTS
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I35f112e9f9f15f06ddb83b4192f082f9e51a969c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39698
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c
index e8bbf57..8ee7c97 100644
--- a/src/soc/amd/picasso/acpi.c
+++ b/src/soc/amd/picasso/acpi.c
@@ -236,13 +236,13 @@
int cores, cpu;
cores = get_cpu_count();
- printk(BIOS_DEBUG, "ACPI \\_PR report %d core(s)\n", cores);
+ printk(BIOS_DEBUG, "ACPI \\_SB report %d core(s)\n", cores);
- /* Generate BSP \_PR.P000 */
+ /* Generate BSP \_SB.P000 */
acpigen_write_processor(0, ACPI_GPE0_BLK, 6);
acpigen_pop_len();
- /* Generate AP \_PR.Pxxx */
+ /* Generate AP \_SB.Pxxx */
for (cpu = 1; cpu < cores; cpu++) {
acpigen_write_processor(cpu, 0, 0);
acpigen_pop_len();
diff --git a/src/soc/amd/picasso/acpi/cpu.asl b/src/soc/amd/picasso/acpi/cpu.asl
index 59ac62e..587dbea 100644
--- a/src/soc/amd/picasso/acpi/cpu.asl
+++ b/src/soc/amd/picasso/acpi/cpu.asl
@@ -21,14 +21,14 @@
* Processor Object
*/
/* These devices are created at runtime */
-External (\_PR.P000, DeviceObj)
-External (\_PR.P001, DeviceObj)
-External (\_PR.P002, DeviceObj)
-External (\_PR.P003, DeviceObj)
-External (\_PR.P004, DeviceObj)
-External (\_PR.P005, DeviceObj)
-External (\_PR.P006, DeviceObj)
-External (\_PR.P007, DeviceObj)
+External (\_SB.P000, DeviceObj)
+External (\_SB.P001, DeviceObj)
+External (\_SB.P002, DeviceObj)
+External (\_SB.P003, DeviceObj)
+External (\_SB.P004, DeviceObj)
+External (\_SB.P005, DeviceObj)
+External (\_SB.P006, DeviceObj)
+External (\_SB.P007, DeviceObj)
/* Return a package containing enabled processor entries */
Method (PPKG)
@@ -36,13 +36,13 @@
If (LGreaterEqual (\PCNT, 2)) {
Return (Package ()
{
- \_PR.P000,
- \_PR.P001
+ \_SB.P000,
+ \_SB.P001
})
} Else {
Return (Package ()
{
- \_PR.P000
+ \_SB.P000
})
}
}
diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c
index 1894bea..61c7f36 100644
--- a/src/soc/amd/picasso/southbridge.c
+++ b/src/soc/amd/picasso/southbridge.c
@@ -367,7 +367,7 @@
pm_write16(PM_TMR_BLK, ACPI_PM_TMR_BLK);
pm_write16(PM_GPE0_BLK, ACPI_GPE0_BLK);
- /* CpuControl is in \_PR.CP00, 6 bytes */
+ /* CpuControl is in \_SB.CP00, 6 bytes */
cst_addr.hi = 0;
cst_addr.lo = ACPI_CPU_CONTROL;
wrmsr(CSTATE_BASE_REG, cst_addr);
diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c
index 01849b8..f59aeb5 100644
--- a/src/soc/amd/stoneyridge/acpi.c
+++ b/src/soc/amd/stoneyridge/acpi.c
@@ -241,13 +241,13 @@
cores = pci_read_config32(SOC_NB_DEV, NB_CAPABILITIES2) & CMP_CAP_MASK;
cores++; /* number of cores is CmpCap+1 */
- printk(BIOS_DEBUG, "ACPI \\_PR report %d core(s)\n", cores);
+ printk(BIOS_DEBUG, "ACPI \\_SB report %d core(s)\n", cores);
- /* Generate BSP \_PR.P000 */
+ /* Generate BSP \_SB.P000 */
acpigen_write_processor(0, ACPI_GPE0_BLK, 6);
acpigen_pop_len();
- /* Generate AP \_PR.Pxxx */
+ /* Generate AP \_SB.Pxxx */
for (cpu = 1; cpu < cores; cpu++) {
acpigen_write_processor(cpu, 0, 0);
acpigen_pop_len();
diff --git a/src/soc/amd/stoneyridge/acpi/cpu.asl b/src/soc/amd/stoneyridge/acpi/cpu.asl
index f52d230..1ecde23 100644
--- a/src/soc/amd/stoneyridge/acpi/cpu.asl
+++ b/src/soc/amd/stoneyridge/acpi/cpu.asl
@@ -21,14 +21,14 @@
* Processor Object
*/
/* These devices are created at runtime */
-External (\_PR.P000, DeviceObj)
-External (\_PR.P001, DeviceObj)
-External (\_PR.P002, DeviceObj)
-External (\_PR.P003, DeviceObj)
-External (\_PR.P004, DeviceObj)
-External (\_PR.P005, DeviceObj)
-External (\_PR.P006, DeviceObj)
-External (\_PR.P007, DeviceObj)
+External (\_SB.P000, DeviceObj)
+External (\_SB.P001, DeviceObj)
+External (\_SB.P002, DeviceObj)
+External (\_SB.P003, DeviceObj)
+External (\_SB.P004, DeviceObj)
+External (\_SB.P005, DeviceObj)
+External (\_SB.P006, DeviceObj)
+External (\_SB.P007, DeviceObj)
/* Return a package containing enabled processor entries */
Method (PPKG)
@@ -36,21 +36,21 @@
If (LGreaterEqual (\PCNT, 4)) {
Return (Package ()
{
- \_PR.P000,
- \_PR.P001,
- \_PR.P002,
- \_PR.P003
+ \_SB.P000,
+ \_SB.P001,
+ \_SB.P002,
+ \_SB.P003
})
} ElseIf (LGreaterEqual (\PCNT, 2)) {
Return (Package ()
{
- \_PR.P000,
- \_PR.P001
+ \_SB.P000,
+ \_SB.P001
})
} Else {
Return (Package ()
{
- \_PR.P000
+ \_SB.P000
})
}
}
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index afe7cf0..3707049 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -227,6 +227,22 @@
acpigen_pop_len();
}
+static void patch_ssdt_processor_scope(acpi_header_t *ssdt)
+{
+ unsigned int len = ssdt->length - sizeof(acpi_header_t);
+ unsigned int i;
+
+ for (i = sizeof(acpi_header_t); i < len; i++) {
+ /* Search for _PR_ scope and replace it with _SB_ */
+ if (*(uint32_t *)((unsigned long)ssdt + i) == 0x5f52505f)
+ *(uint32_t *)((unsigned long)ssdt + i) = 0x5f42535f;
+ }
+ /* Recalculate checksum */
+ ssdt->checksum = 0;
+ ssdt->checksum = acpi_checksum((void *)ssdt, ssdt->length);
+}
+
+
static unsigned long agesa_write_acpi_tables(struct device *device,
unsigned long current,
acpi_rsdp_t *rsdp)
@@ -322,6 +338,7 @@
printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current);
ssdt = (acpi_header_t *)agesawrapper_getlateinitptr(PICK_PSTATE);
if (ssdt != NULL) {
+ patch_ssdt_processor_scope(ssdt);
memcpy((void *)current, ssdt, ssdt->length);
ssdt = (acpi_header_t *)current;
current += ssdt->length;
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 71b2d90..b636c26 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -488,7 +488,7 @@
pm_write16(PM1_CNT_BLK, ACPI_PM1_CNT_BLK);
pm_write16(PM_TMR_BLK, ACPI_PM_TMR_BLK);
pm_write16(PM_GPE0_BLK, ACPI_GPE0_BLK);
- /* CpuControl is in \_PR.CP00, 6 bytes */
+ /* CpuControl is in \_SB.CP00, 6 bytes */
pm_write16(PM_CPU_CTRL, ACPI_CPU_CONTROL);
if (CONFIG(HAVE_SMI_HANDLER)) {