configs: Add intel/harcuvar FSP 2.0 sample configuration
Add Intel Harcuvar CRB FSP 2.0 sample configuration.
Change-Id: I60ec6921eca17a910cd1b9f8b0b86a1a1bf9bbea
Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com>
Reviewed-on: https://review.coreboot.org/21693
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/configs/config.intel_harcuvar b/configs/config.intel_harcuvar
new file mode 100644
index 0000000..5c7de12
--- /dev/null
+++ b/configs/config.intel_harcuvar
@@ -0,0 +1,18 @@
+CONFIG_COLLECT_TIMESTAMPS=y
+CONFIG_VENDOR_INTEL=y
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_BOARD_INTEL_HARCUVAR=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_ENABLE_HSUART=y
+CONFIG_UART_PCI_ADDR=0x8000d000
+
+#Sample settings for Denverton-NS FSP.
+#CONFIG_ADD_FSP_BINARIES=y
+#CONFIG_FSP_M_FILE="../intel/fsp/denverton_ns/DENVERTON-NS_FSP_M.fd"
+#CONFIG_FSP_S_FILE="../intel/fsp/denverton_ns/DENVERTON-NS_FSP_S.fd"
+#CONFIG_FSP_T_FILE="../intel/fsp/denverton_ns/DENVERTON-NS_FSP_T.fd"
+#CONFIG_FSP_CAR=y
+
+#Sample settings for microcode definitions.
+#CONFIG_CPU_MICROCODE_HEADER_FILES="../intel/cpu/denverton_ns/microcode/microcode_blob.h"
+#CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER=y