commit 94aed8d615be092143e838a4c3bf8895438d7235
author Bora Guvendik <bora.guvendik@intel.com> Fri Nov 03 12:40:25 2017 -0700
committer Subrata Banik <subrata.banik@intel.com> Thu Dec 07 05:45:55 2017 +0000
tree ab404887bd7a265951f60707906511a3152f594e
parent c73073c4142882cab60a47de1611bece5851af18

soc/intel/apollolake: add ability to enable eSPI

Add config option to enable eSPI

TEST=Boot to OS

Change-Id: Ib4634690fe4fdb902fc0bc074a3b66b91921ddd5
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/22320
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Hannah Williams <hannah.williams@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>

src/include/device/pci_ids.h

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 4a16143..a7018f7 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2676,6 +2676,7 @@
 #define PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM		0x9d56
 #define PCI_DEVICE_ID_INTEL_APL_LPC		0x5ae8
 #define PCI_DEVICE_ID_INTEL_GLK_LPC		0x31e8
+#define PCI_DEVICE_ID_INTEL_GLK_ESPI		0x3197
 #define PCI_DEVICE_ID_INTEL_CNL_BASE_U_LPC	0x9d85
 #define PCI_DEVICE_ID_INTEL_CNL_U_PREMIUM_LPC	0x9d84
 #define PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC	0x9d83

src/soc/intel/apollolake/Kconfig

diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 99e50e3..166c8ee 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -390,4 +390,10 @@
 	hex
 	default 0x7fff
 
+config SOC_ESPI
+	bool
+	default n
+	help
+	  Use eSPI bus instead of LPC
+
 endif

src/soc/intel/apollolake/lpc.c

diff --git a/src/soc/intel/apollolake/lpc.c b/src/soc/intel/apollolake/lpc.c
index 8abf3eb..95b8bf5 100644
--- a/src/soc/intel/apollolake/lpc.c
+++ b/src/soc/intel/apollolake/lpc.c
@@ -45,6 +45,7 @@
 
 static const struct pad_config lpc_gpios[] = {
 #if IS_ENABLED(CONFIG_SOC_INTEL_GLK)
+#if !IS_ENABLED(CONFIG_SOC_ESPI)
 	PAD_CFG_NF(GPIO_147, UP_20K, DEEP, NF1), /* LPC_ILB_SERIRQ */
 	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_148, UP_20K, DEEP, NF1, HIZCRx1,
 		DISPUPD), /* LPC_CLKOUT0 */
@@ -62,6 +63,7 @@
 		DISPUPD), /* LPC_CLKRUNB */
 	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_155, UP_20K, DEEP, NF1, HIZCRx1,
 		DISPUPD), /* LPC_FRAMEB*/
+#endif /* !IS_ENABLED(CONFIG_SOC_ESPI) */
 #else
 	PAD_CFG_NF(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1),
 	PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1),

src/soc/intel/common/block/lpc/lpc.c

diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index d425667..9d54e11 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -114,6 +114,7 @@
 	PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM,
 	PCI_DEVICE_ID_INTEL_APL_LPC,
 	PCI_DEVICE_ID_INTEL_GLK_LPC,
+	PCI_DEVICE_ID_INTEL_GLK_ESPI,
 	PCI_DEVICE_ID_INTEL_CNL_BASE_U_LPC,
 	PCI_DEVICE_ID_INTEL_CNL_U_PREMIUM_LPC,
 	PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC,