sb/intel: Clean up some SMI enables
Change-Id: I191ad709fd3c6f906cd34b0053eeaebdb80d410d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42354
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/Kconfig b/src/Kconfig
index eef7a96..621a582 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -829,6 +829,10 @@
If unsure, say N.
+config DEBUG_PERIODIC_SMI
+ bool "Trigger SMI periodically"
+ depends on DEBUG_SMI
+
# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
# printk(BIOS_DEBUG, ...) calls.
config DEBUG_MALLOC
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index c0f62bd..5e28cd2 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -231,12 +231,8 @@
reg16 = pci_read_config16(dev, GEN_PMCON_1);
reg16 &= ~(3 << 0); // SMI# rate 1 minute
reg16 &= ~(1 << 10); // Disable BIOS_PCI_EXP_EN for native PME
-#if DEBUG_PERIODIC_SMIS
- /* Set DEBUG_PERIODIC_SMIS in pch.h to debug using
- * periodic SMIs.
- */
- reg16 |= (3 << 0); // Periodic SMI every 8s
-#endif
+ if (CONFIG(DEBUG_PERIODIC_SMI))
+ reg16 |= (3 << 0); // Periodic SMI every 8s
pci_write_config16(dev, GEN_PMCON_1, reg16);
// Set the board's GPI routing.
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 35c7889..a8c14c9 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -40,8 +40,6 @@
#endif
#ifndef __ACPI__
-#define DEBUG_PERIODIC_SMIS 0
-
int pch_silicon_revision(void);
int pch_silicon_type(void);
diff --git a/src/southbridge/intel/common/smi.c b/src/southbridge/intel/common/smi.c
index 80d43a5..e5af3f1 100644
--- a/src/southbridge/intel/common/smi.c
+++ b/src/southbridge/intel/common/smi.c
@@ -12,8 +12,6 @@
#include "pmutil.h"
-#define DEBUG_PERIODIC_SMIS 0
-
u16 get_pmbase(void)
{
return lpc_get_pmbase();
@@ -60,28 +58,16 @@
* - on TCO events
* - on APMC writes (io 0xb2)
* - on writes to SLP_EN (sleep states)
- * - on writes to GBL_RLS (bios commands)
* No SMIs:
* - on microcontroller writes (io 0x62/0x66)
*/
smi_en = 0; /* reset SMI enables */
-
-#if 0
- smi_en |= LEGACY_USB2_EN | LEGACY_USB_EN;
-#endif
smi_en |= TCO_EN;
smi_en |= APMC_EN;
-#if DEBUG_PERIODIC_SMIS
- /* Set DEBUG_PERIODIC_SMIS in pch.h to debug using
- * periodic SMIs.
- */
- smi_en |= PERIODIC_EN;
-#endif
+ if (CONFIG(DEBUG_PERIODIC_SMI))
+ smi_en |= PERIODIC_EN;
smi_en |= SLP_SMI_EN;
-#if 0
- smi_en |= BIOS_EN;
-#endif
/* The following need to be on for SMIs to happen */
smi_en |= EOS | GBL_SMI_EN;
diff --git a/src/southbridge/intel/i82801dx/smi.c b/src/southbridge/intel/i82801dx/smi.c
index 3bcde6c..d7a02ef 100644
--- a/src/southbridge/intel/i82801dx/smi.c
+++ b/src/southbridge/intel/i82801dx/smi.c
@@ -261,18 +261,10 @@
*/
smi_en = 0; /* reset SMI enables */
-
-#if 0
- smi_en |= LEGACY_USB2_EN | LEGACY_USB_EN;
-#endif
smi_en |= TCO_EN;
smi_en |= APMC_EN;
-#if DEBUG_PERIODIC_SMIS
- /* Set DEBUG_PERIODIC_SMIS in i82801gx.h to debug using
- * periodic SMIs.
- */
- smi_en |= PERIODIC_EN;
-#endif
+ if (CONFIG(DEBUG_PERIODIC_SMI))
+ smi_en |= PERIODIC_EN;
smi_en |= SLP_SMI_EN;
smi_en |= BIOS_EN;
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 58f93bd..e3bddf9 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -227,12 +227,8 @@
// another laptop wants this?
// reg16 &= ~(1 << 10); // BIOS_PCI_EXP_EN - Desktop/Mobile only
reg16 |= (1 << 10); // BIOS_PCI_EXP_EN - Desktop/Mobile only
-#if DEBUG_PERIODIC_SMIS
- /* Set DEBUG_PERIODIC_SMIS in i82801gx.h to debug using
- * periodic SMIs.
- */
- reg16 |= (3 << 0); // Periodic SMI every 8s
-#endif
+ if (CONFIG(DEBUG_PERIODIC_SMI))
+ reg16 |= (3 << 0); // Periodic SMI every 8s
pci_write_config16(dev, GEN_PMCON_1, reg16);
// Set the board's GPI routing.
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 11c153f..732e69a 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -228,12 +228,8 @@
// another laptop wants this?
// reg16 &= ~(1 << 10); // BIOS_PCI_EXP_EN - Desktop/Mobile only
reg16 |= (1 << 10); // BIOS_PCI_EXP_EN - Desktop/Mobile only
-#if DEBUG_PERIODIC_SMIS
- /* Set DEBUG_PERIODIC_SMIS in i82801ix.h to debug using
- * periodic SMIs.
- */
- reg16 |= (3 << 0); // Periodic SMI every 8s
-#endif
+ if (CONFIG(DEBUG_PERIODIC_SMI))
+ reg16 |= (3 << 0); // Periodic SMI every 8s
if (config->c5_enable)
reg16 |= (1 << 11); /* Enable C5, C6 and PMSYNC# */
pci_write_config16(dev, D31F0_GEN_PMCON_1, reg16);
diff --git a/src/southbridge/intel/i82801ix/smi.c b/src/southbridge/intel/i82801ix/smi.c
index b8611d0..2bbac886 100644
--- a/src/southbridge/intel/i82801ix/smi.c
+++ b/src/southbridge/intel/i82801ix/smi.c
@@ -69,15 +69,10 @@
*/
smi_en = 0; /* reset SMI enables */
-
smi_en |= TCO_EN;
smi_en |= APMC_EN;
-#if DEBUG_PERIODIC_SMIS
- /* Set DEBUG_PERIODIC_SMIS in i82801ix.h to debug using
- * periodic SMIs.
- */
- smi_en |= PERIODIC_EN;
-#endif
+ if (CONFIG(DEBUG_PERIODIC_SMI))
+ smi_en |= PERIODIC_EN;
smi_en |= BIOS_EN;
/* The following need to be on for SMIs to happen */
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index a590aec..07cf527 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -229,12 +229,8 @@
// another laptop wants this?
// reg16 &= ~(1 << 10); // BIOS_PCI_EXP_EN - Desktop/Mobile only
reg16 |= (1 << 10); // BIOS_PCI_EXP_EN - Desktop/Mobile only
-#if DEBUG_PERIODIC_SMIS
- /* Set DEBUG_PERIODIC_SMIS in i82801jx.h to debug using
- * periodic SMIs.
- */
- reg16 |= (3 << 0); // Periodic SMI every 8s
-#endif
+ if (CONFIG(DEBUG_PERIODIC_SMI))
+ reg16 |= (3 << 0); // Periodic SMI every 8s
if (config->c5_enable)
reg16 |= (1 << 11); /* Enable C5, C6 and PMSYNC# */
pci_write_config16(dev, D31F0_GEN_PMCON_1, reg16);
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index e741fcf..b57e30e 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -225,12 +225,8 @@
reg16 = pci_read_config16(dev, GEN_PMCON_1);
reg16 &= ~(3 << 0); // SMI# rate 1 minute
reg16 &= ~(1 << 10); // Disable BIOS_PCI_EXP_EN for native PME
-#if DEBUG_PERIODIC_SMIS
- /* Set DEBUG_PERIODIC_SMIS in pch.h to debug using
- * periodic SMIs.
- */
- reg16 |= (3 << 0); // Periodic SMI every 8s
-#endif
+ if (CONFIG(DEBUG_PERIODIC_SMI))
+ reg16 |= (3 << 0); // Periodic SMI every 8s
pci_write_config16(dev, GEN_PMCON_1, reg16);
// Set the board's GPI routing.
diff --git a/src/southbridge/intel/ibexpeak/pch.h b/src/southbridge/intel/ibexpeak/pch.h
index d92bc4a..a40fc64 100644
--- a/src/southbridge/intel/ibexpeak/pch.h
+++ b/src/southbridge/intel/ibexpeak/pch.h
@@ -35,7 +35,6 @@
#include <southbridge/intel/common/rcba.h>
#ifndef __ACPI__
-#define DEBUG_PERIODIC_SMIS 0
void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
void enable_usb_bar(void);