tree 80f85e9853ad09fec828c72c8f7c74a48cb3c78c
parent e219862795958009909c36e3a9298dc07935549b
author Lean Sheng Tan <lean.sheng.tan@intel.com> 1622180913 -0700
committer Werner Zeh <werner.zeh@siemens.com> 1622778471 +0000

soc/intel/elkhartlake: Update FSP-S UPD RP & USB related configs

Further add initial Silicon UPD settings for:
- PCIe root ports
- USB

Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: I60afb78a7997b8465dd6318f3abee28f95a65100
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55034
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>