| commit | 92f46aaac7104c62ab3956dc32af5ccbddc944f1 | [log] [tgz] |
|---|---|---|
| author | Elyes HAOUAS <ehaouas@noos.fr> | Tue Sep 15 08:42:17 2020 +0200 |
| committer | Patrick Georgi <pgeorgi@google.com> | Mon Oct 26 06:44:40 2020 +0000 |
| tree | 39fc9cab1ca29fb2fcf6f5ae136384f56e23dff5 | |
| parent | f209b18df3b66d78a9838787182d40fc72eee010 [diff] [blame] |
src: Include <arch/io.h> when appropriate Change-Id: I4077b9dfeeb2a9126c35bbdd3d14c52e55a5e87c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45404 Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/ironlake/romstage.c b/src/northbridge/intel/ironlake/romstage.c index e5ecafe..6b9f3d0 100644 --- a/src/northbridge/intel/ironlake/romstage.c +++ b/src/northbridge/intel/ironlake/romstage.c
@@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <arch/io.h> #include <stdint.h> #include <console/console.h> #include <cf9_reset.h>