mb/google,intel: Use common ChromeEC code for SMI APMC
Change-Id: If4b7c2b94e0fec84831740336ccdbea0922ffbfe
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74513
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
diff --git a/src/mainboard/google/auron/smihandler.c b/src/mainboard/google/auron/smihandler.c
index 6fa95e8..42ab937 100644
--- a/src/mainboard/google/auron/smihandler.c
+++ b/src/mainboard/google/auron/smihandler.c
@@ -7,6 +7,7 @@
#include <soc/pm.h>
#include <elog.h>
#include <ec/google/chromeec/ec.h>
+#include <ec/google/chromeec/smm.h>
#include <southbridge/intel/lynxpoint/lp_gpio.h>
#include <soc/iomap.h>
#include <soc/nvs.h>
@@ -103,21 +104,6 @@
int mainboard_smi_apmc(u8 apmc)
{
- switch (apmc) {
- case APM_CNT_ACPI_ENABLE:
- google_chromeec_set_smi_mask(0);
- /* Clear all pending events */
- while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
- ;
- google_chromeec_set_sci_mask(MAINBOARD_EC_SCI_EVENTS);
- break;
- case APM_CNT_ACPI_DISABLE:
- google_chromeec_set_sci_mask(0);
- /* Clear all pending events */
- while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
- ;
- google_chromeec_set_smi_mask(MAINBOARD_EC_SMI_EVENTS);
- break;
- }
+ chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
return 0;
}