Add support for A-Open DXPL Plus-U motherboard
This is an old (pre-2005) entry-level server mainboard. The code
is adapted from mainboard/intel/xe7501devkit.
Featured chips:
- Dual socket604
- E7505 northbridge
- 82801DB southbridge (with EHCI debug port)
- 82870p2 PCI-X bridge
- LPC47M102S-MC super-io
- 512kB FWH flash (flashrom does the job well)
What works:
- Dual-Xeon P4/HT boot with microcode update
- RAM: registered ECC DDR266 in dual-channel
- PCI-X slot interrupts with ACPI and I/O apic
- On-board PCI-X GbE and SCSI
- ACPI power-off and wakeup with PME#
Notes :
- Current ACPI is more or less a mess
- Interrupts do not route correctly with PIRQ
- MP-table is not implemented
- Issues with reboots remain (cold and warm)
- Many superio devices are disabled by default
- Audio codec is not investigated
Change-Id: I02d18c83f485a09ada65dde03bcc86e9163f2011
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/303
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
diff --git a/src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl b/src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl
new file mode 100644
index 0000000..0effe93
--- /dev/null
+++ b/src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl
@@ -0,0 +1,70 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Kyösti Mälkki <kyosti.malkki@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+Name (PBRS, ResourceTemplate ()
+{
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+ 0x0000, 0x0000, 0x00FF, 0x0000, 0x0100, ,, )
+
+ /* System IO */
+ DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+ 0x0, 0x0, 0xffff, 0x0000, 0x10000, ,,, TypeStatic)
+ IO (Decode16, 0x0CF8, 0x0CF8, 0x08, 0x08, )
+
+ /* Video RAM */
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
+ 0x00000000, 0x000A0000, 0x000BFFFF,
+ 0x00000000, 0x00020000, ,,, AddressRangeMemory, TypeStatic)
+
+ /* Video ROM */
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
+ 0x00000000, 0x000C0000, 0x000C7FFF,
+ 0x00000000, 0x00008000, ,,, AddressRangeMemory, TypeStatic)
+
+ /* Option ROMs ? */
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
+ 0x00000000, 0x000C8000, 0x000DFFFF,
+ 0x00000000, 0x00018000, ,,, AddressRangeMemory, TypeStatic)
+
+ /* Top Of Lowmemory to IOAPIC */
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
+ 0x00000000, 0x02000000, 0xFEBFFFFF,
+ 0x00000000, 0xFCC00000, ,, _Y08, AddressRangeMemory, TypeStatic)
+})
+
+
+Method (_CRS, 0, NotSerialized)
+{
+
+ /* Top Of Lowmemory to IOAPIC */
+ CreateDWordField (PBRS, \_SB.PCI0._Y08._MIN, MEML)
+ CreateDWordField (PBRS, \_SB.PCI0._Y08._LEN, LENM)
+ And (\_SB.PCI0.TOLM, 0xF800, Local1)
+ ShiftRight (Local1, 0x04, Local1)
+ ShiftLeft (Local1, 0x14, MEML)
+ Subtract (0xFEC00000, MEML, LENM)
+
+ Return (PBRS)
+}
+
+Method (_STA, 0, NotSerialized)
+{
+ Return (0x0F)
+}
+