commit 9018dee6856791ab599463a771826936c20a80bb
author Elyes Haouas <ehaouas@noos.fr> Fri Nov 18 15:07:33 2022 +0100
committer Martin L Roth <gaumless@gmail.com> Sat Nov 26 23:39:16 2022 +0000
tree 079e966e6b894bb9c81ca25e9e783c28947e0e64
parent 5aa98964fb4e2e8c10b1663f8d6a3faa2b700410

src/soc/intel: Remove unnecessary space after casts

Change-Id: I098104f32dd7c66d7bb79588ef315a242c3889ba
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69806
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>

src/soc/intel/broadwell/pch/me.c

diff --git a/src/soc/intel/broadwell/pch/me.c b/src/soc/intel/broadwell/pch/me.c
index 4650a224..f1750d2 100644
--- a/src/soc/intel/broadwell/pch/me.c
+++ b/src/soc/intel/broadwell/pch/me.c
@@ -598,7 +598,7 @@
 	u16 reg16;
 
 	/* S3 path will have hidden this device already */
-	if (!mei_base_address || mei_base_address == (u8 *) 0xfffffff0)
+	if (!mei_base_address || mei_base_address == (u8 *)0xfffffff0)
 		return;
 
 	/* Make sure IO is disabled */

src/soc/intel/broadwell/pch/pmutil.c

diff --git a/src/soc/intel/broadwell/pch/pmutil.c b/src/soc/intel/broadwell/pch/pmutil.c
index 3da6bce..931dcc9 100644
--- a/src/soc/intel/broadwell/pch/pmutil.c
+++ b/src/soc/intel/broadwell/pch/pmutil.c
@@ -425,5 +425,5 @@
 /* STM Support */
 uint16_t get_pmbase(void)
 {
-	return (uint16_t) ACPI_BASE_ADDRESS;
+	return (uint16_t)ACPI_BASE_ADDRESS;
 }

src/soc/intel/broadwell/pch/sata.c

diff --git a/src/soc/intel/broadwell/pch/sata.c b/src/soc/intel/broadwell/pch/sata.c
index 9f929a4..edb9830 100644
--- a/src/soc/intel/broadwell/pch/sata.c
+++ b/src/soc/intel/broadwell/pch/sata.c
@@ -82,8 +82,8 @@
 
 	/* PI (Ports implemented) */
 	write32(abar + 0x0c, config->sata_port_map);
-	(void) read32(abar + 0x0c); /* Read back 1 */
-	(void) read32(abar + 0x0c); /* Read back 2 */
+	(void)read32(abar + 0x0c); /* Read back 1 */
+	(void)read32(abar + 0x0c); /* Read back 2 */
 
 	/* CAP2 (HBA Capabilities Extended)*/
 	if (config->sata_devslp_disable) {

src/soc/intel/broadwell/refcode.c

diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c
index 9d4bd2d..ee54f19 100644
--- a/src/soc/intel/broadwell/refcode.c
+++ b/src/soc/intel/broadwell/refcode.c
@@ -50,7 +50,7 @@
 	broadwell_fill_pei_data(&pei_data);
 
 	pei_data.boot_mode = acpi_is_wakeup_s3() ? ACPI_S3 : 0;
-	pei_data.saved_data = (void *) &dummy;
+	pei_data.saved_data = (void *)&dummy;
 
 	entry = load_reference_code();
 	if (entry == NULL) {