commit 9018dee6856791ab599463a771826936c20a80bb
author Elyes Haouas <ehaouas@noos.fr> Fri Nov 18 15:07:33 2022 +0100
committer Martin L Roth <gaumless@gmail.com> Sat Nov 26 23:39:16 2022 +0000
tree 079e966e6b894bb9c81ca25e9e783c28947e0e64
parent 5aa98964fb4e2e8c10b1663f8d6a3faa2b700410

src/soc/intel: Remove unnecessary space after casts

Change-Id: I098104f32dd7c66d7bb79588ef315a242c3889ba
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69806
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>

src/soc/intel/apollolake/acpi.c

diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index 811c762..a537b0f 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -77,7 +77,7 @@
 
 	/* Assign address of PERST_0 if GPIO is defined in devicetree */
 	if (cfg->prt0_gpio != GPIO_PRT0_UDEF)
-		gnvs->prt0 = (uintptr_t) gpio_dwx_address(cfg->prt0_gpio);
+		gnvs->prt0 = (uintptr_t)gpio_dwx_address(cfg->prt0_gpio);
 
 	/* Get sdcard cd GPIO portid if GPIO is defined in devicetree.
 	 * Get offset of sdcard cd pin.
@@ -216,7 +216,7 @@
 static int acpigen_soc_get_gpio_val(unsigned int gpio_num, uint32_t mask)
 {
 	assert(gpio_num < TOTAL_PADS);
-	uintptr_t addr = (uintptr_t) gpio_dwx_address(gpio_num);
+	uintptr_t addr = (uintptr_t)gpio_dwx_address(gpio_num);
 
 	acpigen_soc_get_dw0_in_local5(addr);
 
@@ -240,7 +240,7 @@
 static int acpigen_soc_set_gpio_val(unsigned int gpio_num, uint32_t val)
 {
 	assert(gpio_num < TOTAL_PADS);
-	uintptr_t addr = (uintptr_t) gpio_dwx_address(gpio_num);
+	uintptr_t addr = (uintptr_t)gpio_dwx_address(gpio_num);
 
 	acpigen_soc_get_dw0_in_local5(addr);
 

src/soc/intel/apollolake/cse.c

diff --git a/src/soc/intel/apollolake/cse.c b/src/soc/intel/apollolake/cse.c
index 01c4c47..46bc8fb 100644
--- a/src/soc/intel/apollolake/cse.c
+++ b/src/soc/intel/apollolake/cse.c
@@ -117,7 +117,7 @@
 {
 	uint8_t buff;
 
-	write8(&buff, (uint8_t) state);
+	write8(&buff, (uint8_t)state);
 	return rdev_writeat(rdev, &buff, 0, sizeof(buff));
 }
 

src/soc/intel/apollolake/pmutil.c

diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c
index f474553..878b2a6 100644
--- a/src/soc/intel/apollolake/pmutil.c
+++ b/src/soc/intel/apollolake/pmutil.c
@@ -221,7 +221,7 @@
 /* STM Support */
 uint16_t get_pmbase(void)
 {
-	return (uint16_t) ACPI_BASE_ADDRESS;
+	return (uint16_t)ACPI_BASE_ADDRESS;
 }
 
 void pmc_soc_set_afterg3_en(const bool on)

src/soc/intel/apollolake/romstage.c

diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 757bad3..b9ec4e2 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -294,7 +294,7 @@
 	parse_devicetree_setting(mupd);
 
 	/* Do NOT let FSP do any GPIO pad configuration */
-	mupd->FspmConfig.PreMemGpioTablePtr = (uintptr_t) NULL;
+	mupd->FspmConfig.PreMemGpioTablePtr = (uintptr_t)NULL;
 
 	mupd->FspmConfig.SkipCseRbp = CONFIG(SKIP_CSE_RBP);
 

src/soc/intel/apollolake/systemagent.c

diff --git a/src/soc/intel/apollolake/systemagent.c b/src/soc/intel/apollolake/systemagent.c
index f352f8a..b61f5fa 100644
--- a/src/soc/intel/apollolake/systemagent.c
+++ b/src/soc/intel/apollolake/systemagent.c
@@ -70,7 +70,7 @@
 		printk(BIOS_ERR, "Incorrect PRMRR base hob size\n");
 		return -1;
 	}
-	*prmrr_base = *(uint64_t *) hob;
+	*prmrr_base = *(uint64_t *)hob;
 
 	hob = fsp_find_extension_hob_by_guid(prmrr_size_guid,
 			&hob_size);
@@ -82,7 +82,7 @@
 		printk(BIOS_ERR, "Incorrect PRMRR base hob size\n");
 		return -1;
 	}
-	prmrr_size = *(uint64_t *) hob;
+	prmrr_size = *(uint64_t *)hob;
 	phys_address_mask = (1ULL << cpu_phys_address_size()) - 1;
 	*prmrr_mask = phys_address_mask & ~(uint64_t)(prmrr_size - 1);