diff --git a/src/soc/intel/common/block/pcie/rtd3/rtd3.c b/src/soc/intel/common/block/pcie/rtd3/rtd3.c
index 8b372ed..82336d9 100644
--- a/src/soc/intel/common/block/pcie/rtd3/rtd3.c
+++ b/src/soc/intel/common/block/pcie/rtd3/rtd3.c
@@ -419,9 +419,10 @@
 			return;
 		}
 	}
-	if (config->srcclk_pin == 0) {
+	if (config->srcclk_pin == -1) {
 		if (config->ext_pm_support & ACPI_PCIE_RP_EMIT_SRCK) {
-			printk(BIOS_ERR, "%s: Can not export SRCK method\n", __func__);
+			printk(BIOS_ERR, "%s: Can not export SRCK method since clock source gating is not enabled\n",
+				__func__);
 			return;
 		}
 	}