nb,soc/amd/*/northbridge: use mmio_range to add IOAPIC2 resources
Instead of open coding this, use the mmio_range helper function to tell
the resource allocator about the northbridge's IOAPIC's MMIO. This
change sets the IORESOURCE_RESERVE and IORESOURCE_STORED bits in the
resource flags that weren't set before, but mmio_range is already used
elsewhere for similar purposes.
TEST=None
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id66a73cdb22fd551e4359914ba5513313dcc3193
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77173
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 55a0dab..0c389d5 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -158,8 +158,6 @@
static void nb_read_resources(struct device *dev)
{
- struct resource *res;
-
/*
* This MMCONF resource must be reserved in the PCI domain.
* It is not honored by the coreboot resource allocator if it is in
@@ -168,10 +166,7 @@
mmconf_resource(dev, MMIO_CONF_BASE);
/* NB IOAPIC2 resource */
- res = new_resource(dev, IO_APIC2_ADDR); /* IOAPIC2 */
- res->base = IO_APIC2_ADDR;
- res->size = 0x00001000;
- res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
+ mmio_range(dev, IO_APIC2_ADDR, IO_APIC2_ADDR, 0x1000);
add_fixed_resources(dev, 0);
}