soc/amd/sabrina: Allow to specify custom SPL File
PSP needs SPL file to boot. Introduce the support to add SPL file.
Currently Sabrina does not have a specific SPL file. Use Cezanne SPL
file as a placeholder.
BUG=b:224618411
TEST=Build and boot to OS in Skyrim after adding Sabrina specific SPL
file.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I222bb81b2babddc778b2cff858ef7979f85ac0e6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63313
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig
index 6924ce4..db88fe3 100644
--- a/src/soc/amd/sabrina/Kconfig
+++ b/src/soc/amd/sabrina/Kconfig
@@ -387,6 +387,23 @@
depends on HAVE_PSP_WHITELIST_FILE
default "3rdparty/amd_blobs/cezanne/PSP/wtl-czn.sbin"
+config HAVE_SPL_FILE
+ bool "Have a mainboard specific SPL table file"
+ default n
+ help
+ Have a mainboard specific Security Patch Level (SPL) table file. SPL file
+ is required to support PSP FW anti-rollback and needs to be created by AMD.
+ The default SPL file applies to all boards that use the concerned SoC and
+ is dropped under 3rdparty/blobs. The mainboard specific SPL file override
+ can be applied through SPL_TABLE_FILE config.
+
+ If unsure, answer 'n'
+
+config SPL_TABLE_FILE
+ string "SPL table file"
+ depends on HAVE_SPL_FILE
+ default "3rdparty/amd_blobs/cezanne/PSP/TypeId0x55_SplTableBl_CZN.sbin"
+
config PSP_SOFTFUSE_BITS
string "PSP Soft Fuse bits to enable"
default "28 6"