nb/intel: Drop local legacy_hole definitions
These are architectural and followup works will address
the VGA MMIO and/or ASEG better.
Change-Id: I88e1dca8058661e31ba934b9860751e13a107108
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55928
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 032e500..51e7847 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -35,8 +35,6 @@
* 0xc0000 - 0xcffff: VGA OPROM (needed by kernel)
* 0xe0000 - 0xfffff: SeaBIOS, if used, otherwise DMI
*/
-static const int legacy_hole_base_k = 0xa0000 / 1024;
-static const int legacy_hole_size_k = 384;
static const char *northbridge_acpi_name(const struct device *dev)
{
@@ -66,9 +64,8 @@
{
mmio_resource_kb(dev, index++, uma_memory_base >> 10, uma_memory_size >> 10);
- mmio_resource_kb(dev, index++, legacy_hole_base_k, (0xc0000 >> 10) - legacy_hole_base_k);
-
- reserved_ram_resource_kb(dev, index++, 0xc0000 >> 10, (0x100000 - 0xc0000) >> 10);
+ mmio_from_to(dev, index++, 0xa0000, 0xc0000);
+ reserved_ram_from_to(dev, index++, 0xc0000, 1 * MiB);
if (is_sandybridge()) {
/* Required for SandyBridge sighting 3715511 */
@@ -207,9 +204,8 @@
printk(BIOS_INFO, "Available memory below 4GB: %lluM\n", tomk >> 10);
/* Report the memory regions */
- ram_resource_kb(dev, index++, 0, legacy_hole_base_k);
- ram_resource_kb(dev, index++, legacy_hole_base_k + legacy_hole_size_k,
- (tomk - (legacy_hole_base_k + legacy_hole_size_k)));
+ ram_from_to(dev, index++, 0, 0xa0000);
+ ram_from_to(dev, index++, 1 * MiB, tomk * KiB);
/*
* If >= 4GB installed, then memory from TOLUD to 4GB is remapped above TOM.