commit 8ee11b3e09df4fb6d9cd4fb84e6268e39822728e
author Kyösti Mälkki <kyosti.malkki@gmail.com> Sun Jun 27 21:08:32 2021 +0300
committer Felix Held <felix-coreboot@felixheld.de> Thu Jun 30 16:39:56 2022 +0000
tree 32d2798124b93110200bfa4404dc678d007f32f7
parent 1cb77d1425ac3594eb27d05f5acfa58ed2501c27

nb/intel: Drop local legacy_hole definitions

These are architectural and followup works will address
the VGA MMIO and/or ASEG better.

Change-Id: I88e1dca8058661e31ba934b9860751e13a107108
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55928
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/northbridge/intel/pineview/northbridge.c

diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c
index 4a5a918..bfef56e 100644
--- a/src/northbridge/intel/pineview/northbridge.c
+++ b/src/northbridge/intel/pineview/northbridge.c
@@ -20,7 +20,6 @@
  * 0xc0000 - 0xcffff: VGA OPROM (needed by kernel)
  * 0xe0000 - 0xfffff: SeaBIOS, if used, otherwise DMI
  */
-static const int legacy_hole_base_k = 0xa0000 / KiB;
 
 static void add_fixed_resources(struct device *dev, int index)
 {
@@ -35,8 +34,8 @@
 			| IORESOURCE_STORED
 			| IORESOURCE_ASSIGNED;
 
-	mmio_resource_kb(dev, index++, legacy_hole_base_k, (0xc0000 / KiB) - legacy_hole_base_k);
-	reserved_ram_resource_kb(dev, index++, 0xc0000 / KiB, (0x100000 - 0xc0000) / KiB);
+	mmio_from_to(dev, index++, 0xa0000, 0xc0000);
+	reserved_ram_from_to(dev, index++, 0xc0000, 1 * MiB);
 }
 
 static void mch_domain_read_resources(struct device *dev)