sb/intel/i82801dx: Improve LPC device early init
Make the implementation more similar to i82801gx, enabling
ACPI PM and GPIO register spaces already in bootblock.
Change-Id: I41ad8622801dbbadafdc37359d521eed42256e63
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69671
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/southbridge/intel/i82801dx/bootblock.c b/src/southbridge/intel/i82801dx/bootblock.c
index 6cda0a8..c22eb3e 100644
--- a/src/southbridge/intel/i82801dx/bootblock.c
+++ b/src/southbridge/intel/i82801dx/bootblock.c
@@ -8,4 +8,9 @@
/* Set FWH IDs for 2 MB flash part. */
if (CONFIG_ROM_SIZE == 0x200000)
pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xe8, 0x00001111);
+
+
+ /* Setup decode ports and LPC I/F enables. */
+ i82801dx_early_init();
+ i82801dx_lpc_setup();
}