tree 0572d5598e6c889298abac01e8e004ecd7a04bfa
parent 6151ff3eae6503e1b14fd0898b689f295ddd48f8
author Felix Held <felix-coreboot@felixheld.de> 1643897737 +0100
committer Felix Held <felix-coreboot@felixheld.de> 1643988193 +0000

soc/amd/sabrina/Kconfig: remove TODO from SOC_AMD_COMMON_BLOCK_I2C

Sabrina uses an identical I2C controller as Picasso and Cezanne. Also
both the type and version read-only register of the I2C controller
contain identical values.

The dma_cr, dma_tdlr, dma_rdlr and clr_restart_det registers that are
defined in the dw_i2c_regs struct in the common Designware I2C code
aren't defined in the PPRs of Picasso, Cezanne and Sabrina, but since
common DW I2C code doesn't access those, this is no problem.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I90732aa98518010686f73f80bee229b13e9bc89c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61592
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>