soc/intel/{common,skl,cnl,icl,apl,tgl}: Move HFSTS1 register definition to SoC
Below changes are implemented:
1. Move HFSTS1 register definition to SoC since HFSTS1 register definition
is specific to a SoC. Moving structure back to SoC specific to avoid
unnecessay SoC specific macros in the common code.
2. Define a set of APIs in common code since CSE operation modes and
working states are same across SoCs.
cse_is_hfs1_com_normal(void)
cse_is_hfs1_com_secover_mei_msg(void)
cse_is_hfs1_com_soft_temp_disable(void)
cse_is_hfs1_cws_normal(void)
3. Modify existing code to use callbacks to get data of me_hfs1 structure.
TEST=Build and Boot hatch, soraka, tglrvp, bobba and iclrvp boards.
Change-Id: If7ea6043d7b5473d0c16e83d7b2d4b620c125652
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35546
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index 4b9d1a4..440b59b 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -24,6 +24,7 @@
#include <intelblocks/cse.h>
#include <soc/iomap.h>
#include <soc/pci_devs.h>
+#include <soc/me.h>
#include <string.h>
#include <timer.h>
@@ -238,17 +239,35 @@
return csr & CSR_READY;
}
-/*
- * Checks if CSE is in ME_HFS1_COM_SECOVER_MEI_MSG operation mode. This is the mode where
- * CSE will allow reflashing of CSE region.
- */
-static uint8_t check_cse_sec_override_mode(void)
+static bool cse_check_hfs1_com(int mode)
{
union me_hfsts1 hfs1;
hfs1.data = me_read_config32(PCI_ME_HFSTS1);
- if (hfs1.fields.operation_mode == ME_HFS1_COM_SECOVER_MEI_MSG)
- return 1;
- return 0;
+ return hfs1.fields.operation_mode == mode;
+}
+
+bool cse_is_hfs1_cws_normal(void)
+{
+ union me_hfsts1 hfs1;
+ hfs1.data = me_read_config32(PCI_ME_HFSTS1);
+ if (hfs1.fields.working_state == ME_HFS1_CWS_NORMAL)
+ return true;
+ return false;
+}
+
+bool cse_is_hfs1_com_normal(void)
+{
+ return cse_check_hfs1_com(ME_HFS1_COM_NORMAL);
+}
+
+bool cse_is_hfs1_com_secover_mei_msg(void)
+{
+ return cse_check_hfs1_com(ME_HFS1_COM_SECOVER_MEI_MSG);
+}
+
+bool cse_is_hfs1_com_soft_temp_disable(void)
+{
+ return cse_check_hfs1_com(ME_HFS1_COM_SOFT_TEMP_DISABLE);
}
/* Makes the host ready to communicate with CSE */
@@ -266,7 +285,7 @@
{
struct stopwatch sw;
stopwatch_init_msecs_expire(&sw, HECI_DELAY_READY);
- while (!check_cse_sec_override_mode()) {
+ while (!cse_is_hfs1_com_secover_mei_msg()) {
udelay(HECI_DELAY);
if (stopwatch_expired(&sw))
return 0;
@@ -632,18 +651,15 @@
struct hmrfpo_enable_resp resp;
size_t resp_size = sizeof(struct hmrfpo_enable_resp);
- union me_hfsts1 hfs1;
printk(BIOS_DEBUG, "HECI: Send HMRFPO Enable Command\n");
- hfs1.data = me_read_config32(PCI_ME_HFSTS1);
/*
* This command can be run only if:
* - Working state is normal and
* - Operation mode is normal or temporary disable mode.
*/
- if (hfs1.fields.working_state != ME_HFS1_CWS_NORMAL ||
- (hfs1.fields.operation_mode != ME_HFS1_COM_NORMAL &&
- hfs1.fields.operation_mode != ME_HFS1_COM_SOFT_TEMP_DISABLE)) {
+ if (!cse_is_hfs1_cws_normal() ||
+ (!cse_is_hfs1_com_normal() && !cse_is_hfs1_com_soft_temp_disable())) {
printk(BIOS_ERR, "HECI: ME not in required Mode\n");
goto failed;
}