commit 8e3464109e47945b1a4d7e3dd0c6e291593de70a
author Indrek Kruusa <indrek.kruusa@artecdesign.ee> Thu Aug 03 16:48:18 2006 +0000
committer Stefan Reinauer <stepan@openbios.org> Thu Aug 03 16:48:18 2006 +0000
tree 03493e297dc332c8c7613303eb874e12830e0a5a
parent 8ad7c06535694959952b7d64a9649cb9534abd2a

Changelog:

* src/cpu/amd/model_lx/model_lx_init.c
  L2 cache initialization removed (moved to northbridge.c)
* src/include/cpu/amd/lxdef.h 
  more checked values
* src/northbridge/amd/lx/northbridge.c
  L2 cache initialization added
  cpubug() commented out
* src/northbridge/amd/lx/raminit.c
  empty function sdram_set_registers() is in use, don't remove
* src/mainboard/artecgroup/dbe61/Config.lb
  irqmap changes
* src/mainboard/artecgroup/dbe61/irq_tables.c
  tentative changes to irq table (currently not in use)
* src/mainboard/artecgroup/dbe61/mainboard.c
  irq assigned manually to NIC
* src/mainboard/artecgroup/dbe61/Options.lb
  gcc 4.0 is OK
* targets/artecgroup/dbe61/Config.lb
  64K for VSA is OK at moment
 
Signed-off-by: Indrek Kruusa <indrek.kruusa@artecdesign.ee>
Signed-off-by: Andrei Birjukov <andrei.birjukov@artecdesign.ee>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/include/cpu/amd/lxdef.h

diff --git a/src/include/cpu/amd/lxdef.h b/src/include/cpu/amd/lxdef.h
index 9ee1627..3f174f3 100644
--- a/src/include/cpu/amd/lxdef.h
+++ b/src/include/cpu/amd/lxdef.h
@@ -264,6 +264,10 @@
 #define		RCONF_DMM_LOWER_RCNORM_SHIFT			0
 #define		RCONF_DMM_LOWER_EN_SET					(1<<8)
 
+
+
+/*  ----- GX3 OK  ----  */
+
 #define	CPU_RCONF0							0x1810
 #define	CPU_RCONF1							0x1811
 #define	CPU_RCONF2							0x1812
@@ -272,10 +276,20 @@
 #define	CPU_RCONF5							0x1815
 #define	CPU_RCONF6							0x1816
 #define	CPU_RCONF7							0x1817
+
+/* ------------------------ */
+
+/*  ----- GX3 OK  ----  */
+
 #define	CPU_CR1_MSR							0x1881
 #define	CPU_CR2_MSR							0x1882
 #define	CPU_CR3_MSR							0x1883
 #define	CPU_CR4_MSR							0x1884
+
+/* ------------------------ */
+
+/*  ----- GX3 OK  ----  */
+
 #define	CPU_DC_INDEX						0x1890
 #define	CPU_DC_DATA							0x1891
 #define	CPU_DC_TAG							0x1892
@@ -285,6 +299,9 @@
 #define	CPU_DTB_LRU							0x1899
 #define	CPU_DTB_ENTRY						0x189A
 #define	CPU_DTB_ENTRY_I						0x189B
+
+/* ------------------------ */
+
 #define	CPU_L2TB_INDEX						0x189C
 #define	CPU_L2TB_LRU						0x189D
 #define	CPU_L2TB_ENTRY						0x189E