| commit | 8d9a6f16258ada4d4c995ad55f8230a99b4f7129 | [log] [tgz] |
|---|---|---|
| author | Elyes HAOUAS <ehaouas@noos.fr> | Tue Apr 28 04:57:27 2020 +0200 |
| committer | Patrick Georgi <pgeorgi@google.com> | Mon Jun 22 11:54:08 2020 +0000 |
| tree | 2eaa46b8b6fc5a93e823a081a688f17deaf50ed6 | |
| parent | 1a1b04ea51686226e9dddbd9dd74550b340578a1 [diff] [blame] |
sb/intel/i82801gx: Constify struct southbridge_intel_i82801gx_config Change-Id: Ia5af84782d41a007be04c3dccc291b788ddfddfd Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40773 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c index adf0e49..dcad322 100644 --- a/src/southbridge/intel/i82801gx/pcie.c +++ b/src/southbridge/intel/i82801gx/pcie.c
@@ -166,7 +166,7 @@ int coalesce = 0; if (dev->chip_info != NULL) { - struct southbridge_intel_i82801gx_config *config = dev->chip_info; + const struct southbridge_intel_i82801gx_config *config = dev->chip_info; coalesce = config->pcie_port_coalesce; }