tree be107c667bbd056315ec520eaeb9e0710331e665
parent 8ba96b91dc1559c5a88bad5b4384885d3b384f11
author Gaggery Tsai <gaggery.tsai@intel.com> 1578526511 -0800
committer Tim Wawrzynczak <twawrzynczak@chromium.org> 1608675660 +0000

soc/intel/cannonlake: Add Iccmax and loadlines for CML-S

Following up 3ccae2b7, this patch adds Iccmax and AC/DC
loadlines and iPL2 for CML-S CPUs. The information is from
CML EDS volume 1, doc #606599 and pdg #610244.

Change-Id: Id2797a979a8b6a52a34baae66f95c7136ed1dc72
Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38288
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>