nb/amd/pi/00730F01: add CPU and domain ops in devicetree
Add the CPU and PCI domain operation bindings statically in the chipset
devicetree instead of adding them during runtime.
TEST=PC Engines APU2 still boots and doesn't show any new problems
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I44fa57458c408e74a6341643620c5e9ac1817557
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79085
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
diff --git a/src/northbridge/amd/pi/00730F01/chipset.cb b/src/northbridge/amd/pi/00730F01/chipset.cb
index 57f89c4..bc79426 100644
--- a/src/northbridge/amd/pi/00730F01/chipset.cb
+++ b/src/northbridge/amd/pi/00730F01/chipset.cb
@@ -1,9 +1,12 @@
# SPDX-License-Identifier: GPL-2.0-only
chip northbridge/amd/pi/00730F01
- device cpu_cluster 0 on end
+ device cpu_cluster 0 on
+ ops amd_fam16_mod30_cpu_bus_ops
+ end
device domain 0 on
+ ops amd_fam16_mod30_pci_domain_ops
device pci 0.0 alias gnb on end
device pci 0.2 alias iommu off end
device pci 1.0 alias gfx off end