tree f247394eb42fd4dcb5da95bbe004a2e45aa4bfc5
parent 7c25317093bfae2010e3cfb1981910d8592d8f70
author Subrata Banik <subrata.banik@intel.com> 1617980709 +0530
committer Subrata Banik <subrata.banik@intel.com> 1618056033 +0000

soc/intel/alderlake: Skip D3Cold for TBT

Check TBT NVM FW Ready (INFR) bit to skip D3Cold for TBT when device
is in disconnected state.

Not adhering this recommendation is blocking the S0ix state transition.

BUG=b:183670327
TEST=S0ix state transition occurs with TBT disconnected.

Change-Id: Ib9b9ceee4393aeba37fdcb4e05d1b279a6ff72d2
Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com>
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51274
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>