tree 7fbf7b5dbca683b31ecb78bb6dbc873b7082e28c
parent 8bcd8210ea64bdbb35485d361e645f2c9cfcf763
author Kane Chen <kane.chen@intel.corp-partner.google.com> 1712927775 +0800
committer Felix Held <felix-coreboot@felixheld.de> 1715086237 +0000

soc/intel/mtl: Fixed TBT PCIe devtree remapping

The TBT PCIe devicetree settings are not remapped properly when
TBT PCIe port 0 is disabled.
This code refer SHA:58bc5d937 to remap the PCIe devtree settings
properly in case of TBT PCIe port0 is disabled,

TEST=Tested on screebo and found "Remapping PCIe Root Port #2 msg"
     showed up in coreboot log

Change-Id: I7c7549ddf8ccdd67d7af7c69f51a84614cff9a03
Signed-off-by: Kane Chen <kane.chen@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81841
Reviewed-by: Jakub Czapiga <czapiga@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>