commit 8c85880236d57abf05fb2578a97a3e6dd52e7b7c
author Felix Held <felix-coreboot@felixheld.de> Fri Jul 06 20:22:08 2018 +0200
committer Felix Held <felix-coreboot@felixheld.de> Wed Jul 25 09:28:20 2018 +0000
tree 11d62f6a8f8329a992de997d1560b7bd53fe2a4e
parent a2c49b02998a805e87acddbf11ccf2d4b311c8c2

superio/winbond: remove LDN-specific ops overrides

The pnp ops struct is already passed to the pnp_enable_devices function and it
is used if no override is supplied in the elements of the pnp_info struct array

Change-Id: I4311834f3970bd3471f2f5a73ca7da3c03936d37
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/27385
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

src/superio/winbond/w83627dhg/superio.c

diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c
index 4907435..23b73a2 100644
--- a/src/superio/winbond/w83627dhg/superio.c
+++ b/src/superio/winbond/w83627dhg/superio.c
@@ -58,21 +58,22 @@
 };
 
 static struct pnp_info pnp_dev_info[] = {
-	{ &ops, W83627DHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
-	{ &ops, W83627DHG_PP,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
-	{ &ops, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
-	{ &ops, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
-	{ &ops, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, 0x07ff, },
-	{ &ops, W83627DHG_SPI, PNP_IO1, 0, 0x7f8, },
-	{ &ops, W83627DHG_GPIO6, },
-	{ &ops, W83627DHG_WDTO_PLED, },
-	{ &ops, W83627DHG_GPIO2, },
-	{ &ops, W83627DHG_GPIO3, },
-	{ &ops, W83627DHG_GPIO4, },
-	{ &ops, W83627DHG_GPIO5, },
-	{ &ops, W83627DHG_ACPI, PNP_IRQ0, },
-	{ &ops, W83627DHG_HWM, PNP_IO0 | PNP_IRQ0, 0x07fe, },
-	{ &ops, W83627DHG_PECI_SST, },
+	{ NULL, W83627DHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+	{ NULL, W83627DHG_PP,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+	{ NULL, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+	{ NULL, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+	{ NULL, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
+		0x07ff, 0x07ff, },
+	{ NULL, W83627DHG_SPI, PNP_IO1, 0, 0x7f8, },
+	{ NULL, W83627DHG_GPIO6, },
+	{ NULL, W83627DHG_WDTO_PLED, },
+	{ NULL, W83627DHG_GPIO2, },
+	{ NULL, W83627DHG_GPIO3, },
+	{ NULL, W83627DHG_GPIO4, },
+	{ NULL, W83627DHG_GPIO5, },
+	{ NULL, W83627DHG_ACPI, PNP_IRQ0, },
+	{ NULL, W83627DHG_HWM, PNP_IO0 | PNP_IRQ0, 0x07fe, },
+	{ NULL, W83627DHG_PECI_SST, },
 };
 
 static void enable_dev(struct device *dev)