soc/intel/apollolake: Switch to snake case for ModPhyVoltageBump
For a unification of the naming convension, change from pascal case to
snake case style for parameter 'ModPhyVoltageBump'.
Change-Id: Ic1e743e23bdfc45588411c584eecb839cc552faf
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75856
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index a29ba3b..956a55b 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -617,7 +617,7 @@
/*
* Options to bump USB3 LDO voltage with 40mv.
*/
- silconfig->ModPhyVoltageBump = cfg->ModPhyVoltageBump;
+ silconfig->ModPhyVoltageBump = cfg->mod_phy_voltage_bump;
/*
* Options to adjust PMIC Vdd2 voltage.
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 26e4478..5a3aa88 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -196,7 +196,7 @@
* LDO voltage. Set TRUE to increase LDO voltage with 40mV.
* 0:FALSE (default), 1:True.
*/
- uint8_t ModPhyVoltageBump;
+ uint8_t mod_phy_voltage_bump;
/* Options to adjust PMIC Vdd2 voltage. Default is 0 to not adjusting
* the PMIC Vdd2 default voltage 1.20v. Upd for changing Vdd2 Voltage