diff --git a/src/mainboard/system76/rpl/Kconfig b/src/mainboard/system76/rpl/Kconfig
index 60ea71b..1d32b49 100644
--- a/src/mainboard/system76/rpl/Kconfig
+++ b/src/mainboard/system76/rpl/Kconfig
@@ -65,6 +65,13 @@
 	select SOC_INTEL_ALDERLAKE_PCH_P
 	select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
 
+config BOARD_SYSTEM76_ORYP12
+	select BOARD_SYSTEM76_RPL_COMMON
+	select DRIVERS_I2C_TAS5825M
+	select EC_SYSTEM76_EC_DGPU
+	select PCIEXP_HOTPLUG
+	select SOC_INTEL_ALDERLAKE_PCH_S
+
 config BOARD_SYSTEM76_SERW13
 	select BOARD_SYSTEM76_RPL_COMMON
 	select EC_SYSTEM76_EC_DGPU
@@ -84,6 +91,7 @@
 	default "gaze18" if BOARD_SYSTEM76_GAZE18
 	default "lemp12" if BOARD_SYSTEM76_LEMP12
 	default "oryp11" if BOARD_SYSTEM76_ORYP11
+	default "oryp12" if BOARD_SYSTEM76_ORYP12
 	default "serw13" if BOARD_SYSTEM76_SERW13
 
 config OVERRIDE_DEVICETREE
@@ -97,6 +105,7 @@
 	default "gaze18" if BOARD_SYSTEM76_GAZE18
 	default "lemp12" if BOARD_SYSTEM76_LEMP12
 	default "oryp11" if BOARD_SYSTEM76_ORYP11
+	default "oryp12" if BOARD_SYSTEM76_ORYP12
 	default "serw13" if BOARD_SYSTEM76_SERW13
 
 config MAINBOARD_SMBIOS_PRODUCT_NAME
@@ -106,7 +115,7 @@
 	default "Galago Pro" if BOARD_SYSTEM76_GALP7
 	default "Gazelle" if BOARD_SYSTEM76_GAZE18
 	default "Lemur Pro" if BOARD_SYSTEM76_LEMP12
-	default "Oryx Pro" if BOARD_SYSTEM76_ORYP11
+	default "Oryx Pro" if BOARD_SYSTEM76_ORYP11 || BOARD_SYSTEM76_ORYP12
 	default "Serval WS" if BOARD_SYSTEM76_SERW13
 
 config MAINBOARD_VERSION
@@ -117,6 +126,7 @@
 	default "gaze18" if BOARD_SYSTEM76_GAZE18
 	default "lemp12" if BOARD_SYSTEM76_LEMP12
 	default "oryp11" if BOARD_SYSTEM76_ORYP11
+	default "oryp12" if BOARD_SYSTEM76_ORYP12
 	default "serw13" if BOARD_SYSTEM76_SERW13
 
 config CONSOLE_POST
diff --git a/src/mainboard/system76/rpl/Kconfig.name b/src/mainboard/system76/rpl/Kconfig.name
index da5d400..a33e57c 100644
--- a/src/mainboard/system76/rpl/Kconfig.name
+++ b/src/mainboard/system76/rpl/Kconfig.name
@@ -21,5 +21,8 @@
 config BOARD_SYSTEM76_ORYP11
 	bool "oryp11"
 
+config BOARD_SYSTEM76_ORYP12
+	bool "oryp12"
+
 config BOARD_SYSTEM76_SERW13
 	bool "serw13"
diff --git a/src/mainboard/system76/rpl/variants/oryp12/board.fmd b/src/mainboard/system76/rpl/variants/oryp12/board.fmd
new file mode 100644
index 0000000..b2615d1
--- /dev/null
+++ b/src/mainboard/system76/rpl/variants/oryp12/board.fmd
@@ -0,0 +1,12 @@
+FLASH 32M {
+	SI_DESC 4K
+	SI_ME 3944K
+	SI_BIOS@16M 16M {
+		RW_MRC_CACHE 64K
+		SMMSTORE(PRESERVE) 256K
+		WP_RO {
+			FMAP 4K
+			COREBOOT(CBFS)
+		}
+	}
+}
diff --git a/src/mainboard/system76/rpl/variants/oryp12/board_info.txt b/src/mainboard/system76/rpl/variants/oryp12/board_info.txt
new file mode 100644
index 0000000..0d0df61
--- /dev/null
+++ b/src/mainboard/system76/rpl/variants/oryp12/board_info.txt
@@ -0,0 +1,2 @@
+Board name: oryp12
+Release year: 2024
diff --git a/src/mainboard/system76/rpl/variants/oryp12/data.vbt b/src/mainboard/system76/rpl/variants/oryp12/data.vbt
new file mode 100644
index 0000000..da4235e
--- /dev/null
+++ b/src/mainboard/system76/rpl/variants/oryp12/data.vbt
Binary files differ
diff --git a/src/mainboard/system76/rpl/variants/oryp12/gpio.c b/src/mainboard/system76/rpl/variants/oryp12/gpio.c
new file mode 100644
index 0000000..becce05
--- /dev/null
+++ b/src/mainboard/system76/rpl/variants/oryp12/gpio.c
@@ -0,0 +1,296 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <mainboard/gpio.h>
+#include <soc/gpio.h>
+
+static const struct pad_config gpio_table[] = {
+	/* ------- GPIO Group GPD ------- */
+	PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1), // BATLOW_N
+	PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), // AC_PRESENT
+	PAD_NC(GPD2, NONE),
+	PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), // PWR_BTN#
+	PAD_CFG_NF(GPD4, NONE, PWROK, NF1), // SUSB#_PCH
+	PAD_CFG_NF(GPD5, NONE, PWROK, NF1), // SUSC#_PCH
+	PAD_NC(GPD6, NONE), // SLP_A# (test)
+	PAD_NC(GPD7, NONE), // GPD_7 (strap)
+	PAD_CFG_NF(GPD8, NONE, PWROK, NF1), // CNVI_SUSCLK
+	PAD_CFG_GPO(GPD9, 0, PWROK), // SLP_WLAN#
+	PAD_CFG_NF(GPD10, NONE, DEEP, NF1), // SLP_S5# (test)
+	PAD_NC(GPD11, NONE),
+	PAD_NC(GPD12, NONE),
+
+	/* ------- GPIO Group GPP_A ------- */
+	PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1), // ESPI_IO0_EC
+	PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1), // ESPI_IO1_EC
+	PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1), // ESPI_IO2_EC
+	PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1), // ESPI_IO3_EC
+	PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1), // ESPI_CS_EC#
+	PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1), // ESPI_CLK_EC
+	PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), // ESPI_RESET#
+	PAD_NC(GPP_A7, NONE),
+	PAD_NC(GPP_A8, NONE),
+	PAD_NC(GPP_A9, NONE),
+	PAD_CFG_NF(GPP_A10, UP_20K, DEEP, NF1), // SERIRQ_ESPI_ALERT0
+	PAD_NC(GPP_A11, NONE),
+	PAD_NC(GPP_A12, NONE),
+	PAD_NC(GPP_A13, NONE),
+	PAD_NC(GPP_A14, NONE),
+
+	/* ------- GPIO Group GPP_B ------- */
+	_PAD_CFG_STRUCT(GPP_B0, 0x40100100, 0x3000), // PIRQ#_TPM
+	PAD_CFG_GPI(GPP_B1, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B2, NONE, DEEP), //CNVI_WAKE#
+	PAD_CFG_GPO(GPP_B3, 1, PLTRST), // BT_EN
+	PAD_NC(GPP_B4, NONE),
+	PAD_NC(GPP_B5, NONE),
+	PAD_NC(GPP_B6, NONE),
+	PAD_NC(GPP_B7, NONE), // M2_SSD2_RST#
+	PAD_NC(GPP_B8, NONE), // M2_SSD1_RST#
+	PAD_NC(GPP_B9, NONE), // M2_SSD1_PWR_EN
+	PAD_NC(GPP_B10, NONE), // M2_SSD2_PWR_EN
+	PAD_NC(GPP_B11, NONE),
+	PAD_NC(GPP_B12, NONE),
+	PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), // PLT_RST#
+	PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1), // HDA_SPKR
+	PAD_CFG_GPO(GPP_B15, 0, DEEP), // PS8461_SW (XXX: NC)
+	PAD_NC(GPP_B16, NONE),
+	PAD_NC(GPP_B17, NONE),
+	PAD_CFG_NF(GPP_B18, NONE, PWROK, NF1), // GPP_B18_PMCALERT#
+	PAD_CFG_GPO(GPP_B19, 1, DEEP), // PCH_WLAN_EN (XXX: NC)
+	PAD_CFG_GPO(GPP_B20, 0, DEEP), // GPIO_LANRTD3
+	_PAD_CFG_STRUCT(GPP_B21, 0x42880100, 0x0000), // GPP_B21_TBT_WAKE#
+	PAD_CFG_GPO(GPP_B22, 0, DEEP), // LAN_PLT_RST#
+	PAD_CFG_GPI(GPP_B23, NONE, DEEP), // Crystal frequency bit 1 strap
+
+	/* ------- GPIO Group GPP_C ------- */
+	PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), // SMB_CLK
+	PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), // SMB_DATA
+	PAD_CFG_GPI(GPP_C2, NONE, DEEP), // PCH_PORT80_LED
+	PAD_CFG_NF(GPP_C3, NONE, DEEP, NF3), // GPPB_I2C2_SDA
+	PAD_CFG_NF(GPP_C4, NONE, DEEP, NF3), // GPPB_I2C2_SCL
+	PAD_CFG_GPO(GPP_C5, 0, DEEP), // GPP_C_5_SML0ALERT_N
+	PAD_CFG_NF(GPP_C6, NONE, DEEP, NF2), // I2C_SDA_AMP
+	PAD_CFG_NF(GPP_C7, NONE, DEEP, NF2), // I2C_SCL_AMP
+	PAD_CFG_GPI(GPP_C8, NONE, DEEP), // TPM_DET
+	PAD_NC(GPP_C9, NONE),
+	PAD_NC(GPP_C10, NONE),
+	PAD_NC(GPP_C11, NONE),
+	PAD_NC(GPP_C12, NONE),
+	PAD_NC(GPP_C13, NONE),
+	PAD_NC(GPP_C14, NONE),
+	PAD_NC(GPP_C15, NONE),
+	PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), // I2C_SDA_TP
+	PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), // I2C_SCL_TP
+	PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), // PCH_I2C_SDA
+	PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), // PCH_I2C_SCL
+	// GPP_C20 (UART2_RXD) configured in bootblock
+	// GPP_C21 (UART2_TXD) configured in bootblock
+	PAD_CFG_GPO(GPP_C22, 0, DEEP),
+	PAD_CFG_GPO(GPP_C23, 0, DEEP),
+
+	/* ------- GPIO Group GPP_D ------- */
+	PAD_NC(GPP_D0, NONE),
+	PAD_NC(GPP_D1, NONE),
+	PAD_NC(GPP_D2, NONE),
+	PAD_CFG_GPO(GPP_D3, 0, DEEP), // GFX_DETECT_STRAP
+	PAD_NC(GPP_D4, NONE), // GPP_D4_SML1CLK
+	PAD_CFG_GPO(GPP_D5, 1, DEEP), // M.2_BT_PCMFRM_CRF_RST_N
+	// GPP_D6 (M.2_BT_PCMOUT_CLKREQ0) configured by FSP
+	PAD_NC(GPP_D7, NONE), // M.2_BT_PCMIN
+	PAD_NC(GPP_D8, NONE), // M.2_BT_PCMCLK
+	PAD_NC(GPP_D9, NONE), // GPP_D9_SML0CLK
+	PAD_NC(GPP_D10, NONE), // GPP_D10_SML0DATA
+	PAD_NC(GPP_D11, NONE),
+	PAD_NC(GPP_D12, NONE),
+	PAD_NC(GPP_D13, NONE),
+	PAD_NC(GPP_D14, NONE),
+	PAD_NC(GPP_D15, NONE), // GPP_D15_SML1DATA
+	PAD_NC(GPP_D16, NONE),
+	PAD_NC(GPP_D17, NONE),
+	PAD_NC(GPP_D18, NONE),
+	PAD_NC(GPP_D19, NONE),
+	PAD_NC(GPP_D20, NONE),
+	PAD_NC(GPP_D21, NONE),
+	PAD_NC(GPP_D22, NONE),
+	PAD_NC(GPP_D23, NONE),
+
+	/* ------- GPIO Group GPP_E ------- */
+	PAD_NC(GPP_E0, NONE),
+	PAD_NC(GPP_E1, NONE),
+	PAD_CFG_GPI(GPP_E2, NONE, DEEP), // SWI#
+	PAD_CFG_GPI(GPP_E3, NONE, DEEP), // SMI#
+	PAD_NC(GPP_E4, NONE),
+	PAD_NC(GPP_E5, NONE),
+	PAD_NC(GPP_E6, NONE),
+	PAD_CFG_GPI_INT(GPP_E7, NONE, PLTRST, LEVEL), // TP_ATTN#
+	PAD_NC(GPP_E8, NONE),
+	PAD_CFG_GPI(GPP_E9, NONE, DEEP), // GPP_E_9_USB_OC0_N
+	PAD_CFG_GPI(GPP_E10, NONE, DEEP), // GPP_E_10_USB_OC1_N
+	PAD_CFG_GPI(GPP_E11, NONE, DEEP), // GPP_E_11_USB_OC2_N
+	PAD_CFG_GPI(GPP_E12, NONE, DEEP), // GPP_E_12_USB_OC3_N
+	PAD_NC(GPP_E13, NONE),
+	PAD_NC(GPP_E14, NONE),
+	PAD_CFG_GPO(GPP_E15, 1, DEEP), // ROM_I2C_EN
+	PAD_NC(GPP_E16, NONE),
+	PAD_CFG_GPI(GPP_E17, NONE, DEEP), // SB_KBCRST#
+	PAD_CFG_GPO(GPP_E18, 1, DEEP), // SB_BLON
+	PAD_NC(GPP_E19, NONE),
+	PAD_NC(GPP_E20, NONE),
+	PAD_NC(GPP_E21, NONE),
+
+	/* ------- GPIO Group GPP_F ------- */
+	PAD_NC(GPP_F0, NONE),
+	PAD_NC(GPP_F1, NONE),
+	PAD_CFG_GPO(GPP_F2, 1, DEEP), // GPP_F2_TBT_RST#
+	PAD_NC(GPP_F3, NONE),
+	PAD_NC(GPP_F4, NONE),
+	PAD_CFG_GPI(GPP_F5, NONE, DEEP), // GPIO4_GC6_NVVDD_EN_R
+	PAD_NC(GPP_F6, NONE), // GPU_EVENT#
+	PAD_NC(GPP_F7, NONE),
+	PAD_CFG_GPI(GPP_F8, NONE, PLTRST), // GC6_FB_EN_PCH
+	// GPP_F9 (DGPU_PWR_EN) configured in bootblock
+	PAD_CFG_GPI(GPP_F10, NONE, DEEP), // GPP_F10
+	PAD_NC(GPP_F11, NONE), // CARD_RTD3_RST#
+	PAD_NC(GPP_F12, NONE),
+	PAD_NC(GPP_F13, NONE),
+	PAD_NC(GPP_F14, NONE),
+	PAD_CFG_GPI(GPP_F15, NONE, DEEP), // H_SKTOCC_N
+	PAD_NC(GPP_F16, NONE),
+	PAD_CFG_GPI(GPP_F17, NONE, DEEP), // PLVDD_RST_EC
+	PAD_CFG_GPO(GPP_F18, 0, DEEP), // CCD_FW_WP#
+	PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1), // NB_ENAVDD
+	PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1), // BLON
+	PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1), // EDP_BRIGHTNESS
+	PAD_NC(GPP_F22, NONE),
+	PAD_NC(GPP_F23, NONE),
+
+	/* ------- GPIO Group GPP_G ------- */
+	PAD_NC(GPP_G0, NONE),
+	PAD_NC(GPP_G1, NONE),
+	PAD_NC(GPP_G2, NONE),
+	PAD_CFG_GPI(GPP_G3, NONE, DEEP), // L: W/Pantone, H: W/O Pantone
+	PAD_CFG_GPI(GPP_G4, NONE, DEEP), // L: BID_X2, H: BID_X6/X4
+	PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1), // GPP_G_5_SLP_DRAM_N
+	PAD_CFG_GPI(GPP_G6, NONE, DEEP),
+	PAD_CFG_GPI(GPP_G7, NONE, DEEP),
+
+	/* ------- GPIO Group GPP_H ------- */
+	PAD_CFG_GPI(GPP_H0, NONE, DEEP), // VAL_SV_ADVANCE_STRAP
+	PAD_NC(GPP_H1, NONE),
+	PAD_CFG_GPI(GPP_H2, NONE, DEEP), // LAN_GPIO_WAKE_N
+	// GPP_H3 (PEX_SSD2_CLKREQ#) configured by FSP
+	// GPP_H4 (PEX_SSD1_CLKREQ#) configured by FSP
+	// GPP_H5 (WLAN_CLKREQ#) configured by FSP
+	// GPP_H6 (CARD_CLKREQ#) configured by FSP
+	// GPP_H7 (LAN_CLKREQ#) configured by FSP
+	// GPP_H8 (PEG_CLKREQ#) configured by FSP
+	// GPP_H9 (TBT_CLKREQ#) configured by FSP
+	PAD_NC(GPP_H10, NONE),
+	PAD_NC(GPP_H11, NONE),
+	PAD_CFG_GPO(GPP_H12, 0, DEEP), // L: MAFS, H: SAFS
+	PAD_NC(GPP_H13, NONE),
+	PAD_NC(GPP_H14, NONE),
+	PAD_CFG_GPO(GPP_H15, 0, DEEP), // JTAG ODT: L: disabled, H: enabled
+	PAD_NC(GPP_H16, NONE),
+	PAD_NC(GPP_H17, NONE), // M2_WLAN_RST#
+	PAD_CFG_GPO(GPP_H18, 0, DEEP), // VCCSPI: L: 3.3V, H: 1.8V
+	PAD_NC(GPP_H19, NONE),
+	PAD_NC(GPP_H20, NONE),
+	PAD_CFG_GPO(GPP_H21, 0, DEEP), // TBT_MRESET_PCH
+	PAD_NC(GPP_H22, NONE),
+	PAD_NC(GPP_H23, NONE),
+
+	/* ------- GPIO Group GPP_I ------- */
+	PAD_NC(GPP_I0, NONE),
+	PAD_CFG_NF(GPP_I1, NONE, PLTRST, NF1), // CPU_DP_B_HPD
+	PAD_CFG_NF(GPP_I2, NONE, PLTRST, NF1), // HDMI_HPD
+	PAD_CFG_NF(GPP_I3, NONE, PLTRST, NF1), // CPU_DP_D_HPD
+	PAD_CFG_NF(GPP_I4, NONE, PLTRST, NF1), // G_DP_A_HPD_L
+	PAD_CFG_GPO(GPP_I5, 0, DEEP), // GPIO_TBT_RESET
+	PAD_NC(GPP_I6, NONE),
+	PAD_NC(GPP_I7, NONE),
+	PAD_NC(GPP_I8, NONE),
+	PAD_NC(GPP_I9, NONE),
+	PAD_NC(GPP_I10, NONE),
+	PAD_CFG_GPI(GPP_I11, NONE, DEEP), // GPP_I_11_USB_OC4_N
+	PAD_CFG_GPI(GPP_I12, NONE, DEEP), // GPP_I_12_USB_OC5_N
+	PAD_CFG_GPI(GPP_I13, NONE, DEEP), // GPP_I_13_USB_OC6_N
+	PAD_CFG_GPI(GPP_I14, NONE, DEEP), // GPP_I_14_USB_OC7_N
+	PAD_NC(GPP_I15, NONE),
+	PAD_NC(GPP_I16, NONE),
+	PAD_NC(GPP_I17, NONE),
+	PAD_CFG_GPO(GPP_I18, 0, DEEP), // No Reboot: L: disable H: enable
+	PAD_NC(GPP_I19, NONE),
+	PAD_NC(GPP_I20, NONE),
+	PAD_NC(GPP_I21, NONE),
+	PAD_CFG_GPO(GPP_I22, 0, DEEP), // BIOS fetch routing:
+				       // L: SPI (MAF) or eSPI Flash Ch (SAF)
+				       // H: eSPI Peripheral Ch
+
+	/* ------- GPIO Group GPP_J ------- */
+	PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1), // CNVI_GNSS_PA_BLANKING
+	PAD_CFG_NF(GPP_J1, NONE, DEEP, NF1), // CPU_C10_GATE_N
+	PAD_CFG_NF(GPP_J2, NONE, DEEP, NF1), // CNVI_BRI_DT
+	PAD_CFG_NF(GPP_J3, UP_20K, DEEP, NF1), // CNVI_BRI_RSP
+	PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1), // CNVI_RGI_DT
+	PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1), // CNVI_RGI_RSP
+	PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1), // CNVI_MFUART2_RXD
+	PAD_CFG_NF(GPP_J7, NONE, DEEP, NF1), // CNVI_MFUART2_TXD
+	PAD_CFG_GPI(GPP_J8, NONE, DEEP), // VAL_TEST_SETUP_MENU
+	PAD_NC(GPP_J9, NONE),
+	PAD_NC(GPP_J10, NONE),
+	PAD_NC(GPP_J11, NONE),
+
+	/* ------- GPIO Group GPP_K ------- */
+	_PAD_CFG_STRUCT(GPP_K0, 0x42800100, 0x0000), // TBCIO_PLUG_EVENT#
+	PAD_NC(GPP_K1, NONE),
+	PAD_NC(GPP_K2, NONE),
+	PAD_CFG_GPO(GPP_K3, 1, PLTRST), // TBT_RTD3_PWR_EN_R
+	PAD_CFG_TERM_GPO(GPP_K4, 0, UP_20K, DEEP), // TBT_FORCE_PWR_R
+	PAD_NC(GPP_K5, NONE),
+	// GPP_K6 not in schematics
+	// GPP_K7 not in schematics
+	PAD_CFG_NF(GPP_K8, NONE, DEEP, NF1), // VCCIN_AUX_VID0
+	PAD_CFG_NF(GPP_K9, NONE, DEEP, NF1), // VCCIN_AUX_VID1
+	// GPP_K10 not in schematics
+	PAD_NC(GPP_K11, NONE),
+
+	/* ------- GPIO Group GPP_R ------- */
+	PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1), // HDA_BITCLK
+	PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), // HDA_SYNC
+	PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), // HDA_SDOUT / ME_WE
+	PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), // HDA_SDIN0
+	PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1), // HDA_RST#
+	PAD_CFG_GPO(GPP_R5, 0, DEEP), // PCH_MUTE (XXX: SMART_AMP_EN)
+	PAD_NC(GPP_R6, NONE),
+	PAD_NC(GPP_R7, NONE),
+	PAD_CFG_GPI(GPP_R8, NONE, DEEP), // DGPU_PWRGD_R
+	PAD_CFG_NF(GPP_R9, NONE, DEEP, NF1), // PCH_EDP_HPD
+	PAD_NC(GPP_R10, NONE),
+	PAD_NC(GPP_R11, NONE),
+	PAD_NC(GPP_R12, NONE),
+	PAD_NC(GPP_R13, NONE),
+	PAD_NC(GPP_R14, NONE),
+	PAD_NC(GPP_R15, NONE),
+	// GPP_R16 (DGPU_RST#_PCH) configured in bootblock
+	PAD_NC(GPP_R17, NONE),
+	PAD_NC(GPP_R18, NONE),
+	PAD_CFG_GPI(GPP_R19, NONE, DEEP), // SCI#
+	PAD_NC(GPP_R20, NONE),
+	PAD_NC(GPP_R21, NONE),
+
+	/* ------- GPIO Group GPP_S ------- */
+	PAD_NC(GPP_S0, NONE),
+	PAD_NC(GPP_S1, NONE),
+	PAD_NC(GPP_S2, NONE),
+	PAD_NC(GPP_S3, NONE),
+	PAD_NC(GPP_S4, NONE),
+	PAD_NC(GPP_S5, NONE),
+	PAD_NC(GPP_S6, NONE),
+	PAD_NC(GPP_S7, NONE),
+};
+
+void mainboard_configure_gpios(void)
+{
+	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
+}
diff --git a/src/mainboard/system76/rpl/variants/oryp12/gpio_early.c b/src/mainboard/system76/rpl/variants/oryp12/gpio_early.c
new file mode 100644
index 0000000..b6914ad
--- /dev/null
+++ b/src/mainboard/system76/rpl/variants/oryp12/gpio_early.c
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <mainboard/gpio.h>
+#include <soc/gpio.h>
+
+static const struct pad_config early_gpio_table[] = {
+	PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), // UART2_RXD
+	PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), // UART2_TXD
+	PAD_CFG_GPO(GPP_F9, 0, DEEP), // DGPU_PWR_EN
+	PAD_CFG_GPO(GPP_R16, 0, DEEP), // DGPU_RST#_PCH
+};
+
+void mainboard_configure_early_gpios(void)
+{
+	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
+}
diff --git a/src/mainboard/system76/rpl/variants/oryp12/hda_verb.c b/src/mainboard/system76/rpl/variants/oryp12/hda_verb.c
new file mode 100644
index 0000000..9bd1e6d
--- /dev/null
+++ b/src/mainboard/system76/rpl/variants/oryp12/hda_verb.c
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+	/* Realtek, ALC1220 */
+	0x10ec1220, /* Vendor ID */
+	0x155866a6, /* Subsystem ID */
+	24, /* Number of entries */
+
+	0x02050008, 0x020480cb, 0x02050008, 0x0204c0cb,
+
+	AZALIA_SUBVENDOR(0, 0x155866a6),
+	AZALIA_RESET(1),
+	AZALIA_PIN_CFG(0, 0x12, 0x90a60120),
+	AZALIA_PIN_CFG(0, 0x14, 0x0421101f),
+	AZALIA_PIN_CFG(0, 0x15, 0x40000000),
+	AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x18, 0x04a11030),
+	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1b, 0x90170110),
+	AZALIA_PIN_CFG(0, 0x1d, 0x40a7952d),
+	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
+
+	0x05b50000, 0x05b43530, 0x05750002, 0x05741400,
+	0x02050058, 0x02048ed1, 0x02050063, 0x0204e430,
+	0x02050016, 0x02048020, 0x02050016, 0x02048020,
+	0x02050043, 0x02043005, 0x02050058, 0x02048ed1,
+	0x02050063, 0x0204e430, 0x05b50000, 0x05b43530,
+	0x05750002, 0x05741400, 0x05b5000a, 0x05b45520,
+	0x02050042, 0x020486cb, 0x0143b000, 0x01470740,
+	0x02050036, 0x02042a6a, 0x02050008, 0x0204800b,
+	0x02050007, 0x020403c3, 0x02050007, 0x020403c3,
+	0x0205001b, 0x02044002, 0x0205001b, 0x02044002,
+};
+
+const u32 pc_beep_verbs[] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/system76/rpl/variants/oryp12/overridetree.cb b/src/mainboard/system76/rpl/variants/oryp12/overridetree.cb
new file mode 100644
index 0000000..54f42be
--- /dev/null
+++ b/src/mainboard/system76/rpl/variants/oryp12/overridetree.cb
@@ -0,0 +1,121 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+chip soc/intel/alderlake
+	# Support 5600 MT/s memory
+	register "max_dram_speed_mts" = "5600"
+
+	device domain 0 on
+		subsystemid 0x1558 0x66a6 inherit
+
+		device ref xhci on
+			register "usb2_ports" = "{
+				[0] = USB2_PORT_MID(OC_SKIP),		// J_AUD1
+				[2] = USB2_PORT_MID(OC_SKIP),		// J_TYPEC2
+				[5] = USB2_PORT_MID(OC_SKIP),		// J_USB1
+				[7] = USB2_PORT_MID(OC_SKIP),		// Camera
+				[8] = USB2_PORT_MID(OC_SKIP),		// J_TYPEC1 (TBT)
+				[13] = USB2_PORT_MID(OC_SKIP),		// Bluetooth
+			}"
+			register "usb3_ports" = "{
+				[0] = USB3_PORT_DEFAULT(OC_SKIP),	// J_AUD1
+				[1] = USB3_PORT_DEFAULT(OC_SKIP),	// J_USB1
+				[3] = USB3_PORT_DEFAULT(OC_SKIP),	// J_TYPEC2
+			}"
+		end
+
+		device ref i2c0 on
+			# Touchpad I2C bus
+			register "serial_io_i2c_mode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
+			chip drivers/i2c/hid
+				register "generic.hid" = ""ELAN0412""
+				register "generic.desc" = ""ELAN Touchpad""
+				register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_E7)"
+				register "generic.detect" = "1"
+				register "hid_desc_reg_offset" = "0x01"
+				device i2c 15 on end
+			end
+			chip drivers/i2c/hid
+				register "generic.hid" = ""FTCS1000""
+				register "generic.desc" = ""FocalTech Touchpad""
+				register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_E7)"
+				register "generic.detect" = "1"
+				register "hid_desc_reg_offset" = "0x01"
+				device i2c 38 on end
+			end
+		end
+		device ref i2c1 on
+			# Thunderbolt
+			register "serial_io_i2c_mode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
+		end
+		device ref i2c2 on
+			# Pantone
+			register "serial_io_i2c_mode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
+		end
+		device ref i2c3 on
+			# TAS5825M smart amp
+			register "serial_io_i2c_mode[PchSerialIoIndexI2C3]" = "PchSerialIoPci"
+			chip drivers/i2c/tas5825m
+				register "id" = "0"
+				device i2c 4e on end # (8bit address: 0x9c)
+			end
+		end
+
+		device ref pcie5_0 on
+			# GPU
+			register "cpu_pcie_rp[CPU_RP(2)]" = "{
+				.clk_src = 14,
+				.clk_req = 14,
+				.flags = PCIE_RP_LTR | PCIE_RP_AER,
+			}"
+		end
+		device ref pcie_rp3 on
+			# GLAN
+			register "pch_pcie_rp[PCH_RP(3)]" = "{
+				.clk_src = 13,
+				.clk_req = 13,
+				.flags = PCIE_RP_LTR | PCIE_RP_AER,
+			}"
+		end
+		device ref pcie_rp5 on
+			# CARD
+			register "pch_pcie_rp[PCH_RP(5)]" = "{
+				.clk_src = 12,
+				.clk_req = 12,
+				.flags = PCIE_RP_LTR | PCIE_RP_AER | PCIE_RP_HOTPLUG,
+			}"
+		end
+		device ref pcie_rp8 on
+			# WLAN
+			register "pch_pcie_rp[PCH_RP(8)]" = "{
+				.clk_src = 11,
+				.clk_req = 11,
+				.flags = PCIE_RP_LTR | PCIE_RP_AER,
+			}"
+		end
+		device ref pcie_rp9 on
+			# SSD1
+			register "pch_pcie_rp[PCH_RP(9)]" = "{
+				.clk_src = 10,
+				.clk_req = 10,
+				.flags = PCIE_RP_LTR | PCIE_RP_AER,
+			}"
+		end
+		device ref pcie_rp13 on
+			# SSD2
+			register "pch_pcie_rp[PCH_RP(13)]" = "{
+				.clk_src = 9,
+				.clk_req = 9,
+				.flags = PCIE_RP_LTR | PCIE_RP_AER,
+			}"
+		end
+		device ref pcie_rp25 on
+			# TBT
+			# XXX: AER causes UnsupReq warnings
+			register "pch_pcie_rp[PCH_RP(25)]" = "{
+				.clk_src = 15,
+				.clk_req = 15,
+				.flags = PCIE_RP_LTR | PCIE_RP_HOTPLUG,
+			}"
+		end
+	end
+end
diff --git a/src/mainboard/system76/rpl/variants/oryp12/romstage.c b/src/mainboard/system76/rpl/variants/oryp12/romstage.c
new file mode 100644
index 0000000..fe91032
--- /dev/null
+++ b/src/mainboard/system76/rpl/variants/oryp12/romstage.c
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/meminit.h>
+#include <soc/romstage.h>
+
+void mainboard_memory_init_params(FSPM_UPD *mupd)
+{
+	const struct mb_cfg board_cfg = {
+		.type = MEM_TYPE_DDR5,
+		.ect = true,
+		.LpDdrDqDqsReTraining = 1,
+		.ddr_config = {
+			.dq_pins_interleaved = true,
+		},
+	};
+	const struct mem_spd spd_info = {
+		.topo = MEM_TOPO_DIMM_MODULE,
+		.smbus = {
+			[0] = { .addr_dimm[0] = 0x50, },
+			[1] = { .addr_dimm[0] = 0x52, },
+		},
+	};
+	const bool half_populated = false;
+
+	// Set primary display to hybrid graphics
+	mupd->FspmConfig.PrimaryDisplay = 4;
+
+	mupd->FspmConfig.DmiMaxLinkSpeed = 4;
+	mupd->FspmConfig.GpioOverride = 0;
+
+	memcfg_init(mupd, &board_cfg, &spd_info, half_populated);
+}
diff --git a/src/mainboard/system76/rpl/variants/oryp12/tas5825m.c b/src/mainboard/system76/rpl/variants/oryp12/tas5825m.c
new file mode 100644
index 0000000..45dfb38
--- /dev/null
+++ b/src/mainboard/system76/rpl/variants/oryp12/tas5825m.c
@@ -0,0 +1,1053 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <delay.h>
+#include <drivers/i2c/tas5825m/tas5825m.h>
+
+int tas5825m_setup(struct device *dev, int id)
+{
+	int res;
+
+	res = tas5825m_set_book(dev, 0x00);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x03, 0x02);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x01, 0x11);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x03, 0x02);
+	if (res < 0)
+		return res;
+
+	mdelay(5);
+
+	res = tas5825m_write_at(dev, 0x03, 0x12);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x48, 0x0C);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x7F, 0x64);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x01);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0xFE, 0x00, 0x40, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x50, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0x82, 0x00, 0x93, 0x00, 0xFC, 0x00, 0x00,
+			0x8F, 0x00, 0xFF, 0xEF, 0x84, 0x49, 0x03, 0x27,
+			0x84, 0x02, 0x04, 0x06, 0x02, 0x60, 0x00, 0x01,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x02);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x02, 0x70, 0x00, 0x06, 0x02, 0x78, 0x00, 0x05,
+			0x02, 0x68, 0x00, 0x02, 0x02, 0x28, 0x03, 0x4D,
+			0x84, 0x2A, 0x04, 0x00, 0xE2, 0x57, 0x91, 0x9F,
+			0x84, 0x82, 0x20, 0xE0, 0x84, 0x82, 0x04, 0x01,
+			0xF0, 0x1C, 0x31, 0xA0, 0xF0, 0x1C, 0x31, 0xA1,
+			0xF0, 0x1C, 0x31, 0xA2, 0xF0, 0x1F, 0x31, 0xA3,
+			0xE4, 0x00, 0x11, 0xA6, 0x80, 0x27, 0x80, 0xE1,
+			0xF4, 0x00, 0x11, 0xA4, 0xF4, 0x1D, 0x31, 0xA5,
+			0xF4, 0x1C, 0x31, 0xA7, 0xF4, 0x1F, 0x31, 0xA8,
+			0x02, 0x78, 0x00, 0x03, 0xE2, 0x68, 0xF1, 0xC3,
+			0x80, 0x67, 0x80, 0xE9, 0x84, 0x4B, 0x03, 0x27,
+			0x02, 0x70, 0x00, 0x04, 0x84, 0x41, 0x03, 0x37,
+			0x80, 0x07, 0x00, 0x80, 0xE0, 0x00, 0x11, 0xA9,
+			0x84, 0x82, 0x00, 0xE0, 0x8E, 0xFC, 0x04, 0x10,
+			0xF0, 0x1C, 0x11, 0xAA, 0xF0, 0x1C, 0x11, 0xAB,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x03);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0xF0, 0x1C, 0x11, 0xAC, 0xF0, 0x1F, 0x11, 0xAD,
+			0x86, 0xA1, 0x01, 0xC2, 0x80, 0x27, 0x80, 0xE8,
+			0x60, 0x00, 0x00, 0x00, 0x84, 0x43, 0x03, 0x37,
+			0x80, 0x00, 0x00, 0x81, 0x0D, 0x00, 0x10, 0x20,
+			0x84, 0x51, 0x03, 0x3E, 0x08, 0x44, 0x26, 0x30,
+			0x84, 0xC3, 0x03, 0x47, 0x84, 0xC2, 0x40, 0xE0,
+			0x8C, 0xFF, 0x03, 0x23, 0xE0, 0x10, 0x11, 0xB3,
+			0xF0, 0x1C, 0x51, 0xB4, 0xF0, 0x1C, 0x51, 0xB5,
+			0xF0, 0x1C, 0x51, 0xB6, 0xF0, 0x1F, 0x51, 0xB7,
+			0x86, 0xA1, 0x01, 0xC6, 0x80, 0x27, 0x80, 0xEA,
+			0x84, 0x53, 0x03, 0x3E, 0x84, 0x82, 0x04, 0x05,
+			0x84, 0x51, 0x03, 0x75, 0xE2, 0x6B, 0xC0, 0x00,
+			0x80, 0x07, 0x00, 0x80, 0xE0, 0x80, 0x31, 0xB8,
+			0x84, 0x82, 0x40, 0xE0, 0xF0, 0x1C, 0x51, 0xB9,
+			0xF0, 0x1C, 0x51, 0xBA, 0xF0, 0x1C, 0x51, 0xBB,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x04);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0xF0, 0x1F, 0x51, 0xBC, 0x86, 0xA1, 0x01, 0xC5,
+			0x80, 0x27, 0x80, 0xEA, 0x60, 0x00, 0x00, 0x00,
+			0x80, 0x00, 0x00, 0x81, 0x84, 0xA1, 0x03, 0x4F,
+			0xE0, 0x80, 0xA0, 0x00, 0x01, 0x07, 0x11, 0x20,
+			0x08, 0x44, 0x26, 0x30, 0x08, 0x00, 0x98, 0x4A,
+			0x84, 0x53, 0x03, 0x75, 0x08, 0x00, 0x30, 0x48,
+			0x02, 0xCA, 0x00, 0x01, 0x08, 0x60, 0x26, 0x32,
+			0x84, 0x51, 0x03, 0x45, 0xE4, 0x10, 0x40, 0x00,
+			0x80, 0x40, 0xC0, 0x82, 0x84, 0xC2, 0x40, 0xE0,
+			0x84, 0xC3, 0x03, 0x5E, 0x08, 0x00, 0x50, 0x48,
+			0xE0, 0x10, 0x11, 0xBD, 0x02, 0xC2, 0x00, 0x02,
+			0x08, 0x60, 0x06, 0x12, 0x84, 0xD3, 0x03, 0x4F,
+			0xF0, 0x1C, 0x51, 0xBE, 0xF0, 0x1C, 0x51, 0xBF,
+			0xF0, 0x1C, 0x51, 0xC0, 0xF0, 0x1F, 0x51, 0xC1,
+			0x84, 0xA1, 0x03, 0x65, 0x80, 0x27, 0x80, 0xEA,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x05);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0xE0, 0x00, 0x00, 0x00, 0x80, 0x07, 0x00, 0x83,
+			0x08, 0x00, 0x98, 0x6B, 0x08, 0x00, 0x30, 0x68,
+			0x84, 0x53, 0x03, 0x45, 0x08, 0x60, 0x26, 0x33,
+			0x84, 0x51, 0x03, 0x25, 0xE4, 0x10, 0x60, 0x00,
+			0x80, 0x40, 0xC0, 0x81, 0x02, 0x70, 0x00, 0x7F,
+			0x08, 0x00, 0x50, 0x28, 0x08, 0x60, 0x06, 0x11,
+			0x84, 0xCB, 0x03, 0x65, 0xE0, 0x10, 0x51, 0xC4,
+			0x84, 0x80, 0x41, 0x00, 0x02, 0xA3, 0x00, 0x10,
+			0xE4, 0x00, 0x00, 0x00, 0x84, 0xD0, 0x04, 0x01,
+			0x84, 0xA2, 0x04, 0x03, 0x84, 0xD2, 0x50, 0x01,
+			0x84, 0x53, 0x03, 0x25, 0x80, 0x00, 0xC4, 0x04,
+			0x8F, 0x30, 0x00, 0x00, 0x88, 0x67, 0x03, 0x00,
+			0xE4, 0x00, 0x11, 0x9B, 0xEE, 0x64, 0x60, 0x00,
+			0x02, 0xD3, 0x00, 0x10, 0x88, 0x47, 0x00, 0x80,
+			0x10, 0x00, 0x18, 0x02, 0x86, 0xC1, 0x01, 0x9D,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x06);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0xE0, 0x10, 0x31, 0xC7, 0x86, 0xC9, 0x01, 0x9E,
+			0x80, 0x00, 0xC4, 0x02, 0x02, 0x50, 0x01, 0x9C,
+			0x00, 0xFF, 0x21, 0x65, 0x00, 0xFC, 0x00, 0x00,
+			0x02, 0x60, 0x00, 0x01, 0x02, 0x70, 0x00, 0x04,
+			0x84, 0xC8, 0x04, 0x10, 0x84, 0x41, 0x03, 0x67,
+			0x84, 0x51, 0x03, 0x6D, 0x84, 0xC0, 0x04, 0x02,
+			0x04, 0x80, 0x91, 0x20, 0x08, 0x60, 0x26, 0x30,
+			0x02, 0x78, 0x00, 0x03, 0x02, 0x68, 0x00, 0x02,
+			0x0D, 0x00, 0x10, 0x10, 0x08, 0x60, 0x06, 0x12,
+			0x84, 0x49, 0x03, 0x2F, 0xE0, 0x80, 0x71, 0xA9,
+			0x02, 0x28, 0x03, 0x55, 0x84, 0x82, 0x00, 0xE0,
+			0x84, 0x2A, 0x04, 0x00, 0xF0, 0x1C, 0x11, 0xAA,
+			0xF0, 0x1C, 0x11, 0xAB, 0xF0, 0x1C, 0x11, 0xAC,
+			0xF0, 0x1F, 0x11, 0xAD, 0x86, 0xA1, 0x01, 0xAE,
+			0x80, 0x27, 0x80, 0xE8, 0x84, 0x82, 0x04, 0x07,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x07);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0xE0, 0x80, 0x60, 0x00, 0x84, 0x82, 0x40, 0xE0,
+			0x84, 0x43, 0x03, 0x67, 0xF0, 0x1C, 0x51, 0xAF,
+			0xF0, 0x1C, 0x51, 0xB0, 0xF0, 0x1C, 0x51, 0xB1,
+			0xF0, 0x1F, 0x51, 0xB2, 0x02, 0x78, 0x00, 0x05,
+			0x80, 0x27, 0x80, 0xEA, 0x84, 0x82, 0x04, 0x08,
+			0x02, 0x70, 0x00, 0x06, 0x84, 0x53, 0x03, 0x6D,
+			0x84, 0x80, 0x04, 0x07, 0xE0, 0x00, 0x00, 0x82,
+			0xF0, 0x81, 0x00, 0x80, 0x80, 0x07, 0x12, 0xBC,
+			0x86, 0xA1, 0x01, 0x9F, 0xE2, 0x57, 0xA0, 0x00,
+			0x84, 0x82, 0x04, 0x09, 0x84, 0x82, 0x20, 0xE0,
+			0xF0, 0x1C, 0x31, 0xA0, 0xF0, 0x1C, 0x31, 0xA1,
+			0xF0, 0x1C, 0x31, 0xA2, 0xF0, 0x1F, 0x31, 0xA3,
+			0xE4, 0x00, 0x11, 0xA6, 0x80, 0x27, 0x80, 0xE1,
+			0xF4, 0x00, 0x11, 0xA4, 0xF4, 0x1D, 0x31, 0xA5,
+			0xF4, 0x1C, 0x31, 0xA7, 0xF4, 0x1F, 0x31, 0xA8,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x08);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x02, 0x78, 0x00, 0x03, 0xE2, 0x6A, 0xF1, 0xC3,
+			0x80, 0x67, 0x80, 0xE9, 0x84, 0x4B, 0x03, 0x2F,
+			0x02, 0x70, 0x00, 0x04, 0x84, 0x59, 0x03, 0x3D,
+			0x80, 0x07, 0x00, 0x80, 0xE0, 0x00, 0x11, 0xA9,
+			0x84, 0x82, 0x60, 0xE0, 0x8E, 0xFC, 0x04, 0x10,
+			0xF0, 0x1C, 0x71, 0xAA, 0xF0, 0x1C, 0x71, 0xAB,
+			0xF0, 0x1C, 0x71, 0xAC, 0xF0, 0x1F, 0x71, 0xAD,
+			0x86, 0xA1, 0x01, 0xC2, 0x80, 0x27, 0x80, 0xEB,
+			0x60, 0x00, 0x00, 0x00, 0x84, 0x5B, 0x03, 0x3D,
+			0x80, 0x00, 0x00, 0x81, 0x0D, 0x00, 0x10, 0x20,
+			0x84, 0x59, 0x03, 0x3F, 0x08, 0x44, 0x26, 0x30,
+			0x84, 0xC3, 0x03, 0x57, 0x84, 0xC2, 0x60, 0xE0,
+			0xE0, 0x10, 0x11, 0xB3, 0xF0, 0x1C, 0x71, 0xB4,
+			0xF0, 0x1C, 0x71, 0xB5, 0xF0, 0x1C, 0x71, 0xB6,
+			0xF0, 0x1F, 0x71, 0xB7, 0x86, 0xA1, 0x01, 0xC6,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x09);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x80, 0x27, 0x80, 0xEB, 0x84, 0x5B, 0x03, 0x3F,
+			0x84, 0x82, 0x04, 0x0D, 0x84, 0x41, 0x03, 0x76,
+			0xE2, 0x6B, 0xE0, 0x00, 0x80, 0x07, 0x00, 0x80,
+			0xE0, 0x81, 0x31, 0xB8, 0x84, 0x82, 0x00, 0xE0,
+			0xF0, 0x1C, 0x11, 0xB9, 0xF0, 0x1C, 0x11, 0xBA,
+			0xF0, 0x1C, 0x11, 0xBB, 0xF0, 0x1F, 0x11, 0xBC,
+			0x86, 0xA1, 0x01, 0xC5, 0x80, 0x27, 0x80, 0xE8,
+			0x60, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x81,
+			0x84, 0xA1, 0x03, 0x5D, 0xE0, 0x81, 0xA0, 0x00,
+			0x01, 0x07, 0x11, 0x20, 0x08, 0x44, 0x26, 0x30,
+			0x08, 0x00, 0x98, 0x4A, 0x84, 0x43, 0x03, 0x76,
+			0x08, 0x00, 0x30, 0x48, 0x02, 0xCA, 0x00, 0x01,
+			0x08, 0x60, 0x26, 0x32, 0x84, 0x41, 0x03, 0x46,
+			0xE4, 0x10, 0x40, 0x00, 0x80, 0x40, 0xC0, 0x82,
+			0x84, 0xC2, 0x00, 0xE0, 0x84, 0xC3, 0x03, 0x5F,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0A);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x00, 0x50, 0x48, 0xE0, 0x10, 0x11, 0xBD,
+			0x02, 0xC2, 0x00, 0x02, 0x08, 0x60, 0x06, 0x12,
+			0x84, 0xD3, 0x03, 0x5D, 0xF0, 0x1C, 0x11, 0xBE,
+			0xF0, 0x1C, 0x11, 0xBF, 0xF0, 0x1C, 0x11, 0xC0,
+			0xF0, 0x1F, 0x11, 0xC1, 0x84, 0xA1, 0x03, 0x66,
+			0x80, 0x27, 0x80, 0xE8, 0xE0, 0x00, 0x00, 0x00,
+			0x80, 0x07, 0x00, 0x83, 0x08, 0x00, 0x98, 0x6B,
+			0x08, 0x00, 0x30, 0x68, 0x84, 0x43, 0x03, 0x46,
+			0x08, 0x60, 0x26, 0x33, 0x84, 0x51, 0x03, 0x26,
+			0xE4, 0x10, 0x60, 0x00, 0x80, 0x40, 0xC0, 0x81,
+			0x02, 0x70, 0x00, 0x7F, 0x08, 0x00, 0x50, 0x28,
+			0x08, 0x60, 0x06, 0x11, 0x8C, 0xFF, 0x03, 0x24,
+			0x84, 0xCB, 0x03, 0x66, 0xE0, 0x10, 0x51, 0xC4,
+			0x84, 0x80, 0x41, 0x00, 0x02, 0xA3, 0x00, 0x10,
+			0xE4, 0x00, 0x00, 0x00, 0x84, 0xD0, 0x04, 0x09,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0B);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x84, 0xA2, 0x04, 0x0B, 0x84, 0xD2, 0x50, 0x01,
+			0x84, 0x53, 0x03, 0x26, 0x80, 0x00, 0xC4, 0x0C,
+			0x8F, 0x30, 0x00, 0x00, 0x88, 0x67, 0x03, 0x00,
+			0xE4, 0x00, 0x11, 0x9B, 0xEE, 0x64, 0x80, 0x00,
+			0x02, 0xD3, 0x00, 0x10, 0x88, 0x47, 0x00, 0x80,
+			0x10, 0x00, 0x18, 0x02, 0x86, 0xC1, 0x01, 0x9D,
+			0xE0, 0x10, 0x31, 0xC7, 0x86, 0xC9, 0x01, 0x9E,
+			0x80, 0x00, 0xC4, 0x0A, 0x02, 0x50, 0x01, 0x9C,
+			0x00, 0xFF, 0x21, 0x65, 0x00, 0xFC, 0x00, 0x00,
+			0x02, 0x70, 0x00, 0x04, 0x02, 0x68, 0x00, 0x01,
+			0x02, 0x60, 0x00, 0x03, 0x02, 0x78, 0x00, 0x02,
+			0x84, 0x49, 0x03, 0x6E, 0x84, 0x41, 0x03, 0x6F,
+			0x84, 0xC8, 0x04, 0x10, 0x84, 0xC0, 0x04, 0x0A,
+			0x04, 0x81, 0x91, 0x20, 0x08, 0x60, 0x26, 0x30,
+			0x0D, 0x00, 0x10, 0x10, 0x08, 0x60, 0x06, 0x12,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0C);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x84, 0x00, 0x04, 0x06, 0xE0, 0x81, 0x71, 0xA9,
+			0x84, 0x82, 0x20, 0xE8, 0xF0, 0x1D, 0x31, 0xAA,
+			0xF0, 0x1D, 0x31, 0xAB, 0xF0, 0x1D, 0x31, 0xAC,
+			0xF0, 0x1C, 0x31, 0xAD, 0x86, 0xA1, 0x01, 0xAE,
+			0x80, 0x27, 0x80, 0xF9, 0x84, 0x82, 0x04, 0x0E,
+			0xE0, 0x81, 0x60, 0x00, 0x84, 0x82, 0x00, 0xE8,
+			0x84, 0x4B, 0x03, 0x6E, 0xF0, 0x1D, 0x11, 0xAF,
+			0xF0, 0x1D, 0x11, 0xB0, 0xF0, 0x1D, 0x11, 0xB1,
+			0xF0, 0x1C, 0x11, 0xB2, 0x02, 0xA3, 0x00, 0x1A,
+			0x80, 0x27, 0x80, 0xF8, 0x84, 0x82, 0x04, 0x0F,
+			0xE0, 0x81, 0xC0, 0x00, 0xF0, 0x81, 0xE0, 0x80,
+			0x84, 0x43, 0x03, 0x6F, 0x80, 0x07, 0x12, 0xBD,
+			0x02, 0xC0, 0x00, 0x00, 0x00, 0xFC, 0x50, 0x00,
+			0x8F, 0x00, 0x00, 0x11, 0x8F, 0x00, 0xFF, 0xFF,
+			0x84, 0x58, 0x04, 0x01, 0x84, 0xC2, 0x04, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0D);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x02, 0xC2, 0x60, 0x00, 0x84, 0xA0, 0x61, 0x00,
+			0xE0, 0x20, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x40, 0x40, 0xA0, 0x00, 0x80, 0x00, 0xC0, 0x82,
+			0x08, 0xFC, 0x48, 0x3A, 0x08, 0xFC, 0x18, 0x50,
+			0x00, 0xFC, 0x00, 0x00, 0xE0, 0x10, 0x00, 0x00,
+			0x86, 0xA0, 0x41, 0x00, 0x40, 0x47, 0x20, 0x00,
+			0x80, 0x00, 0xC0, 0x83, 0x04, 0xE0, 0x3D, 0x1E,
+			0x04, 0x80, 0x11, 0xE0, 0x08, 0x44, 0x26, 0x33,
+			0x02, 0xCB, 0x00, 0x10, 0xE0, 0x10, 0x40, 0x83,
+			0x08, 0x00, 0x28, 0x21, 0x84, 0xCA, 0x61, 0x00,
+			0x80, 0x07, 0x00, 0x81, 0x0C, 0xE0, 0x2C, 0x09,
+			0x84, 0xCA, 0x21, 0x00, 0x00, 0xFC, 0x50, 0x00,
+			0x8F, 0x00, 0x00, 0x01, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_book(dev, 0x78);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x18);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x30, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x1B);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x80, 0x00, 0x00, 0x04, 0x00,
+			0x00, 0x00, 0x03, 0x28, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x6C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x1C);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x30, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x1C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x38, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x3C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x40, 0x00, 0x00, 0x03, 0x48,
+			0x00, 0x00, 0x03, 0x50, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x54, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x58, 0x00, 0x00, 0x03, 0x60,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x74, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x1D);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x1C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x3C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x1E);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x68, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x0C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x70, 0x00, 0x00, 0x03, 0x78,
+			0x00, 0x00, 0x04, 0x80, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x24, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x04, 0x88, 0x00, 0x00, 0x04, 0x90,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x44, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_book(dev, 0x8C);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x0E);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0xA7, 0x26, 0x4A, 0x7F, 0xFF, 0xFF, 0xFF,
+			0x00, 0x20, 0xC4, 0x9C, 0x00, 0x20, 0xC4, 0x9C,
+			0x00, 0x00, 0x68, 0xDB, 0x00, 0x00, 0xD1, 0xB7,
+			0x00, 0x00, 0x68, 0xDB, 0x0F, 0xA4, 0xA8, 0xC1,
+			0xF8, 0x59, 0x7F, 0x63, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x5C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0F);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x07, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x2F, 0xB7, 0xE9,
+			0x00, 0x5F, 0x6F, 0xD2, 0x00, 0x2F, 0xB7, 0xE9,
+			0x0B, 0x1E, 0x4F, 0x76, 0xFC, 0x23, 0x05, 0x54,
+			0xFA, 0x41, 0x20, 0x5C, 0x0B, 0x7D, 0xBF, 0x48,
+			0xFA, 0x41, 0x20, 0x5C, 0x0B, 0x1E, 0x4F, 0x76,
+			0xFC, 0x23, 0x05, 0x54, 0x00, 0x04, 0x81, 0x6F,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x0F, 0x3F, 0xE5, 0xC9, 0xF8, 0xBB, 0x98, 0xC8,
+			0x07, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x81, 0x6F,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x0F, 0x3F, 0xE5, 0xC9, 0xF8, 0xBB, 0x98, 0xC8,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x10);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x89, 0xA0, 0x27, 0x7F, 0xEC, 0x56, 0xD5,
+			0x7F, 0xFC, 0xB9, 0x23, 0x00, 0x89, 0xA0, 0x27,
+			0x7F, 0xEC, 0x56, 0xD5, 0x7F, 0xFC, 0xB9, 0x23,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_book(dev, 0x00);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x40, 0x00);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x11, 0xFF, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x7D, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x01);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x51, 0x05);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x02);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x19, 0xDF);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x00);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x46, 0x11);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x02, 0x00);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x53, 0x01);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x54, 0x00);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x03, 0x02);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x7F, 0x8C);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x01);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x71, 0x94, 0x9A, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x2C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0A);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
+			0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x64, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0B);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x80, 0x00, 0x00, 0x00, 0x28, 0x7A, 0x27,
+			0x00, 0x28, 0x7A, 0x27, 0x00, 0x80, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x80, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x57, 0x62, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x28, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0E);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x03, 0x69, 0xC5, 0x01, 0x24, 0x02, 0xCB,
+			0x00, 0x22, 0x1D, 0x95, 0x00, 0x03, 0x69, 0xC5,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x5C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0F);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x7F, 0xF9, 0x2C, 0x60, 0x09, 0xC6, 0x4C, 0xCF,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x5C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x07);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x80, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x64, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x40, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x6C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_book(dev, 0xAA);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x01);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x05, 0xA9, 0xDF, 0x7B, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x30, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x02);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x03);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x07, 0xE0, 0x03, 0x27, 0xF0, 0x3F, 0xF9, 0xB1,
+			0x07, 0xE0, 0x03, 0x27, 0x0F, 0xBF, 0xC1, 0x46,
+			0xF8, 0x3F, 0xB4, 0xA8, 0x07, 0xE8, 0x73, 0x5B,
+			0xF0, 0x2F, 0x19, 0x4B, 0x07, 0xE8, 0x73, 0x5B,
+			0x0F, 0xD0, 0xA1, 0x62, 0xF8, 0x2E, 0xD3, 0xF8,
+			0x07, 0xE8, 0x65, 0x1C, 0xF0, 0x4C, 0x95, 0x0B,
+			0x07, 0xCC, 0x6D, 0xBC, 0x0F, 0xB3, 0x6A, 0xF5,
+			0xF8, 0x4B, 0x2D, 0x28, 0x08, 0x1D, 0xB8, 0xB2,
+			0xF0, 0x12, 0x40, 0x2B, 0x07, 0xD1, 0x74, 0x3E,
+			0x0F, 0xEE, 0x30, 0x8F, 0xF8, 0x11, 0x43, 0xC9,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x04);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x05);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x07, 0xE0, 0x03, 0x27,
+			0xF0, 0x3F, 0xF9, 0xB1, 0x07, 0xE0, 0x03, 0x27,
+			0x0F, 0xBF, 0xC1, 0x46, 0xF8, 0x3F, 0xB4, 0xA8,
+			0x07, 0xE8, 0x73, 0x5B, 0xF0, 0x2F, 0x19, 0x4B,
+			0x07, 0xE8, 0x73, 0x5B, 0x0F, 0xD0, 0xA1, 0x62,
+			0xF8, 0x2E, 0xD3, 0xF8, 0x07, 0xE8, 0x65, 0x1C,
+			0xF0, 0x4C, 0x95, 0x0B, 0x07, 0xCC, 0x6D, 0xBC,
+			0x0F, 0xB3, 0x6A, 0xF5, 0xF8, 0x4B, 0x2D, 0x28,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x06);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x1D, 0xB8, 0xB2, 0xF0, 0x12, 0x40, 0x2B,
+			0x07, 0xD1, 0x74, 0x3E, 0x0F, 0xEE, 0x30, 0x8F,
+			0xF8, 0x11, 0x43, 0xC9, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0E);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x88, 0xF4, 0xB0, 0xFF, 0x02, 0x86, 0x19,
+			0x00, 0x75, 0xF1, 0x4C, 0x0F, 0xE2, 0x49, 0x11,
+			0xF8, 0x1C, 0x4A, 0xDB, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x6C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0F);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0xFF, 0xF4, 0x49, 0x81,
+			0xFF, 0xE8, 0x93, 0x02, 0xFF, 0xF4, 0x49, 0x81,
+			0x0D, 0x94, 0x7A, 0x64, 0xFA, 0x3C, 0xAB, 0xA1,
+			0x06, 0xD5, 0xF3, 0xB1, 0xF2, 0x54, 0x18, 0x9F,
+			0x06, 0xD5, 0xF3, 0xB1, 0x0D, 0x94, 0x7A, 0x64,
+			0xFA, 0x3C, 0xAB, 0xA1, 0x00, 0x00, 0x38, 0xE4,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x0F, 0xD5, 0x55, 0x55, 0xF8, 0x2A, 0x71, 0xC7,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_book(dev, 0x00);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x30, 0x00);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x60, 0x02);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x62, 0x09);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x4C, 0x30);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x03, 0x03);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x78, 0x80);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x00);
+	if (res < 0)
+		return res;
+
+	return 0;
+}