mb/google/kahlee: Do not define SIO_EC_ENABLE_COM1

This #define tells superio.asl to add a "PNP0501" "Plug and Play
16550A-compatible COM port" entry to kahlee's ACPI tables.

The EC on kahlee boards do not provide a "Serial Port 1" that should
be exposed via ACPI to the OS.  In fact, this entry confuses the
kernel and in some cases can cause it to try to redirect output to a
non existing port.

TEST=Deploy to grunt.  Boot kernel with SERIAL_PORT_DFNS undefined and
 "earlycon=uart,mmio32,0xfedc6000,115200,48000000" on the kernel
 command line, and with an image with serial console enabled.
 => System boots with (kernel) serial console enabled, starting from
    0.00 (earlycon), with no gaps in its output, and serial console
    also allows logging in.

Change-Id: I0eaed9b4461bb6a6c1aa4ce97752f588d4322b35
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-on: https://review.coreboot.org/25021
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h
index 16b2669..e93c2dd 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h
+++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h
@@ -67,6 +67,5 @@
 #define SIO_EC_MEMMAP_ENABLE	/* EC Memory Map Resources */
 #define SIO_EC_HOST_ENABLE	/* EC Host Interface Resources */
 #define SIO_EC_ENABLE_PS2K	/* Enable PS/2 Keyboard */
-#define SIO_EC_ENABLE_COM1	/* Enable Serial Port 1 */