commit 8992e53c23cb088efbdafbf3e2ba77e7d8778d71
author Stefan Reinauer <reinauer@chromium.org> Thu May 02 16:16:41 2013 -0700
committer Stefan Reinauer <stefan.reinauer@coreboot.org> Mon Nov 25 23:31:52 2013 +0100
tree 1eba559ee986c4994b63e75d9647fc733ae833f6
parent 441a4baf87ada2608a109a203a5d8040f6dc2b0d

libpayload: Add USB support for non-PCI controllers

Restructure USB stack to not depend on PCI, and
make PCI stub available on x86, but provide fixed
BARs for ARM (Exynos 5)

Change-Id: Iee7c8b134c22b661a9a515e24943470c9dbadd1f
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/49970
Reviewed-on: http://review.coreboot.org/4175
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

payloads/libpayload/drivers/usb/usbinit.c

diff --git a/payloads/libpayload/drivers/usb/usbinit.c b/payloads/libpayload/drivers/usb/usbinit.c
index 76653ff..f74a833 100644
--- a/payloads/libpayload/drivers/usb/usbinit.c
+++ b/payloads/libpayload/drivers/usb/usbinit.c
@@ -27,6 +27,7 @@
  * SUCH DAMAGE.
  */
 
+//#define USB_DEBUG
 #include <libpayload-config.h>
 #include <usb/usb.h>
 #include "uhci.h"
@@ -35,6 +36,7 @@
 #include "xhci.h"
 #include <usb/usbdisk.h>
 
+#ifdef CONFIG_USB_PCI
 /**
  * Initializes USB controller attached to PCI
  *
@@ -58,8 +60,6 @@
 	prog_if = (class >> 8) & 0xff;
 
 	/* enable busmaster */
-#define PCI_COMMAND 4
-#define PCI_COMMAND_MASTER 4
 	if (devclass == 0xc03) {
 		u32 pci_command;
 
@@ -73,7 +73,7 @@
 		case 0x00:
 #ifdef CONFIG_USB_UHCI
 			usb_debug("UHCI controller\n");
-			uhci_init (pci_device);
+			uhci_pci_init (pci_device);
 #else
 			usb_debug("UHCI controller (not supported)\n");
 #endif
@@ -82,7 +82,7 @@
 		case 0x10:
 #ifdef CONFIG_USB_OHCI
 			usb_debug("OHCI controller\n");
-			ohci_init(pci_device);
+			ohci_pci_init(pci_device);
 #else
 			usb_debug("OHCI controller (not supported)\n");
 #endif
@@ -91,7 +91,7 @@
 		case 0x20:
 #ifdef CONFIG_USB_EHCI
 			usb_debug("EHCI controller\n");
-			ehci_init(pci_device);
+			ehci_pci_init(pci_device);
 #else
 			usb_debug("EHCI controller (not supported)\n");
 #endif
@@ -100,7 +100,7 @@
 		case 0x30:
 #ifdef CONFIG_USB_XHCI
 			usb_debug("xHCI controller\n");
-			xhci_init(pci_device);
+			xhci_pci_init(pci_device);
 #else
 			usb_debug("xHCI controller (not supported)\n");
 #endif
@@ -154,12 +154,33 @@
 		}
 	}
 }
+#endif
+
+#ifdef CONFIG_USB_MEMORY
+static void usb_scan_memory(void)
+{
+#ifdef CONFIG_USB_XHCI
+	xhci_init((void *)(unsigned long)CONFIG_USB_XHCI_BASE_ADDRESS);
+#endif
+#ifdef CONFIG_USB_EHCI
+	ehci_init((void *)(unsigned long)CONFIG_USB_EHCI_BASE_ADDRESS);
+#endif
+#ifdef CONFIG_USB_OHCI
+	ohci_init((void *)(unsigned long)CONFIG_USB_OHCI_BASE_ADDRESS);
+#endif
+}
+#endif
 
 /**
  * Initialize all USB controllers attached to PCI.
  */
 int usb_initialize(void)
 {
+#ifdef CONFIG_USB_PCI
 	usb_scan_pci_bus(0);
+#endif
+#ifdef CONFIG_USB_MEMORY
+	usb_scan_memory();
+#endif
 	return 0;
 }