commit | 886f4e862a0b064d1055aeff8f621f3c5d1ce3ac | [log] [tgz] |
---|---|---|
author | Furquan Shaikh <furquan@google.com> | Sun Nov 22 11:37:44 2020 -0800 |
committer | Furquan Shaikh <furquan@google.com> | Tue Dec 08 22:55:41 2020 +0000 |
tree | 127fd50dd597380c6285fa1a564cb55dff0e655a | |
parent | b652aaef990cc3eb481dea7f8d4cc3eecd92ffa1 [diff] |
soc/intel/common/fast_spi: Add custom boot media device This change enables support for a custom boot media device in fast SPI controller driver if the platform supports additional decode window for mapping BIOS regions greater than 16MiB. Following new Kconfigs are added: 1. FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW: SoC can select this to indicate support for extended BIOS window. 2. EXT_BIOS_WIN_BASE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the base address of the host space that is reserved for mapping the extended window. 3. EXT_BIOS_WIN_SIZE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the size of the host space reserved for mapping extended window. If platform indicates support for extended BIOS decode window, cbfstool add command is provided additional parameters for the decode window using --ext-win-base and --ext-win-size. It is the responsibility of the mainboard fmap author to ensure that the sections in the BIOS region do not cross 16MiB boundary as the host space windows are not contiguous. This change adds a build time check to ensure no sections in FMAP cross the 16MiB boundary. Even though the platform supports extended window, it depends upon the size of BIOS region (which in turn depends on SPI flash size) whether and how much of the additional window is utilized at runtime. This change also provides helper functions for rest of the coreboot components to query how much of the extended window is actually utilized. BUG=b:171534504 Change-Id: I1b564aed9809cf14b40a3b8e907622266fc782e2 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47659 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you're feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.