tree 43c0004bdac2badb8e81aed04e62872cdf111a42
parent 25620524237ec4665f5a462fe6dbc4dcef313870
author Keith Hui <buurin@gmail.com> 1701062159 -0500
committer Felix Singer <service+coreboot-gerrit@felixsinger.de> 1703349860 +0000

sb/intel/bd82x6x: Honor POST code Kconfig option

This southbridge can route POST codes written to port 0x80 to either
LPC or PCI, but currently always route them to LPC. Change it so that
POST codes are routed to PCI if CONFIG(POST_DEVICE_PCI_PCIE) is
selected, LPC otherwise.

Rename the static function because POST codes no longer always go to
LPC.

Change-Id: I455d7aff27154d6821e262a21248e8c7306e2d61
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79725
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Nico Huber <nico.h@gmx.de>