soc/intel/meteorlake: Update tcss_usb3 alias
TCSS and TBT use the same lane on schematic. Update the port start
from 0 to match the Intel schematic. You can better follow the it
without convert the port number.
Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: Ic6631dcbbd9f6c79c756b015425e2da778eb395e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
diff --git a/src/soc/intel/meteorlake/chipset.cb b/src/soc/intel/meteorlake/chipset.cb
index 57d1205..6a9c26a 100644
--- a/src/soc/intel/meteorlake/chipset.cb
+++ b/src/soc/intel/meteorlake/chipset.cb
@@ -57,16 +57,16 @@
register "type" = "UPC_TYPE_HUB"
device usb 0.0 alias tcss_root_hub off
chip drivers/usb/acpi
- device usb 3.0 alias tcss_usb3_port1 off end
+ device usb 3.0 alias tcss_usb3_port0 off end
end
chip drivers/usb/acpi
- device usb 3.1 alias tcss_usb3_port2 off end
+ device usb 3.1 alias tcss_usb3_port1 off end
end
chip drivers/usb/acpi
- device usb 3.2 alias tcss_usb3_port3 off end
+ device usb 3.2 alias tcss_usb3_port2 off end
end
chip drivers/usb/acpi
- device usb 3.3 alias tcss_usb3_port4 off end
+ device usb 3.3 alias tcss_usb3_port3 off end
end
end
end